Risposte a domande aperte per il corso Wide Bandgap Semiconductor Power Devices

ON

has a thickness t . Defining A as the device area or, equivalently, the cross-section of the

Si

resistor which has length t , it’s possible to find out which is the R over the device:

Si ON

1

=

which helps to find the specific on-resistance per unit-area

= ∙ =

which is the equivalent resistance seen inside the device supposing it to have a device area

equal to 1cm . More in general, it’s evident that the greater the area, the greater the resistance,

2

so it’s clear that anyone can model R as desired. Anyway, is more convenient to treat the

ON

case in which the device has a unit device area.

According to r , many ways are possible to reduce it. It’s possible to lower t , or also increase

ON Si

mobility µ or N .

n D

Looking at the definition of t , it’s important to remember that

Si

≥ =

, ,

in order to guarantee that the condition 1

≈ ,

2

holds.

Imposing the best theoretical condition for t such that

Si

= ,

it’s possible to get 1

, ,

= = ∙

Introducing V into the r equation,

BR ON 4

1

, ,

= ∙ ∙

4 ,

1 4

= ∙

,

2 ,

that is 4

= =

,

∝

This result shows an important characteristic of this structure: on-resistance has a quadratic

dependance on the breakdown voltage. Small variation of V implies large variations for r .

BR ON

It’s still possible to scale r by placing in parallel N-th vertical transistors, in order to scale by a

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factor of N the total r seen through the parallel.

ON

A figure of merit used to estimate which is the most suitable material in relation to its

performance is the Baliga FOM:

= ∙ ∙ ∝

The higher this figure of merit, the better the material performance over this situation.

4. Derive the on-resistance per unit area versus breakdown voltage figure of merit for the

simplified super junction structure investigated during the lessons.

Superjuction structure is a breakthrough technology which exploits a better r vs. V relation

ON BR

than basic vertical structure.

Starting from its conformation, it is composed by di erent pillars (n- and p-doped) placed in

contact with each other along the vertical direction. They are largely doped, maintaining the

charge balance (so N = N ), in order to be depleted with a relatively low voltage. This structure

A D

allows to better control the electric field profile and to reshape it in order to reach higher

breakdown voltages using the same epi thickness of vertical structures.

Let’s suppose to have this structure, in which all the pillars have the same doping (N = N ),

A D

their area over the x,z direction is A, the length of the pillars is l and all the n pillars are drain-

y

to-source connected while the p ones are connected only to the gate contact.

Starting from the on-resistance R , it’s possible to state that:

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 p- and n- doped pillars have thickness d

 they have the same area A, but just half of them are conducting

 as said, the y dimension is l y

So the R is equal to

ON 2

= ∙

and the specific on-resistance per unit area is 2

=

In o -state condition (V < V , V > 0) the electric field profile grows only on z direction until

GS TH DS

the pillars are not completely depleted. This is an important step, because at this point they

will behave like dielectrics. The electric field profile over z

direction will constantly vary between the pillars,

reaching the maximum value right at their junction.

According to the Poisson’s equation, and remembering

that N = N ,

A D

, = =− ⎯⎯⎯ = ∙

,

2

E must be lower than the critical electric field. So, it’s

z,max

possible to state that

= , 0 < < 1

,

Applying this equivalence into the past relation, the

expression becomes: = 2

At this point, when the pn junctions are depleted, the electric field will grow only on the y

direction. Let’s insert other two pillars, representing the drain (n-doped on the left) and the gate

(p-doped on the right). The application of a voltage at the drain will impose a V on the

DG

structure that, behaving like a dielectric, will imply a constant electric field ΔE over the

y

structure itself. This electric field contribution will sum up to the one over the z axis, E in

z,max

any of the contact point between the depleted pillars and the p-pillar of the gate. Let’s take a

generic point to express this relation.

According to the graph reported, the following relation is extracted:

1

= ∙ + ∆ ∙ +

,

2 2

but according to the reasonable dimensions of d and l , it’s possible to state that

y

≈ ∆ ∙ , ≫

Let’s now express the maximum value of ΔE . Evaluating two di erent points in which it’s

y

possible to define the electric field, the determination of the maximum electric field is possible

and, according to it, also the comparison with the critical one can be performed.

At the edge of the p-pillar on the right, the components of the electric field are

=0

= ∆ + ,

=0

since the E has the same direction of ΔE according to their disposition. At this point the

z,max y

maximum electric field E is

1 = ∆ + ,

Let’s consider another point in the middle of the pillar stack, at the edge of two pillars. In this

point, the electric field has this contribution:

=0

= ∆

= ,

due to the depletion of the pillars and also to the V contribution. The electric field E is so

DG 2

given by = + + = ∆ + ,

It’s clear to see that ≥

so the maximum electric field over the device is E , which under breakdown conditions

1

becomes =

∆ + =

,

(1

∆ = − )

Finally, the breakdown voltage has a relation:

(1

= − ) ∙

Now the r vs. V can be extracted. In fact,

ON BR 2

=

and remembering that

= (1 − )

= 2

it becomes 2 2 2 2

= = = = =

2 2(1 − ) (1 − )

To minimize r it’s su icient to impose α = ½, in order to get

ON 4

=

that is the relation requested. Compared to the r vs. V relation of vertical structure, there’s

ON BR

no more quadratic dependence of the r . It still depends on material criteria, but also on

ON

design parameters, as the thickness of pillars figures inside this equation.

5. Describe the cross-section of an IGBT device. What is its equivalent circuit? Why are Silicon

IGBT’s o ering best performance at high voltages than Si-MOSFETs? What is the main

weakness of IGBTs?

IGBT stands for Insulated Gate Bipolar

Transistor. This acronym suggests that in

the nature of this device there is a

bipolar device, which is known to

guarantee interesting current-voltage

dependance but it’s also named

“insulated gate”, so somewhere there

should be a contact that is controlling

the gate of a MOSFET.

Basically speaking, this device is a

mixture of a BJT (a PNP, to be precise)

and a MOSFET and has technical

characteristics which are quite in the

middle of the two. According to the

representation shown, there are three

main contacts: collector on the

back, emitter on the top and the gate

which is insulated. In the surface of

the device, a p-well is obtained and

inside of it two n-wells are present.

The gate overlaps the p-n+ region,

controlling the flow of electrons of

the internal MOSFET drawn. R mod

connects the internal drain with the

base of the PNP BJT drawn in the n+

bu er layer, defining so the base

current. The application of a gate

voltage larger than V implies the

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generation of a base current, turning

on the BJT and so bringing the IGBT in on-state. In the opposite case, when the gate voltage is

below threshold voltage, no current is generated and so the BJT is in interdiction state.

The equivalent scheme of this device is here reported. Looking at the way it is built, it doesn’t

admit a collector-emitter voltage V < 0, so it’s mandatory to place in parallel a freewheeling

CE

diode to prevent damages to the device and to protect it in case of polarity inversion.

As already said, the bipolar capabilities allows the IGBT to sustain higher currents with respect

to Si-MOSFETs at high voltages, due to the I vs. V characteristics which is exponential.

CE CE

Nevertheless, the fact that this is a bipolar device means that a large amount of charge must

be removed by the PNP base, leading to a really bad commutation performance compared to

Si-MOSFETs.

6. Define and comment on the figures of merit defined for hard-switching and soft-switching

applications.

A device has di erent figures of merit, able to describe the physical phenomena which are

playing a role into the working principle of it. One of this figures is the R x Q product, which

ON G

relates the on-resistance of the device and the total charge present at the gate. The lower this

product, the smaller the time required to charge/discharge C during transitions.

G

Clearly the term Q is quite general and does not take into account of hard or soft switching

G

scenarios, so in the following a more precise argumentation is performed.

During a hard-switch scenario, the charge involved in the transition is

= + −

, ,

so the figure of merit becomes

= ∙ + − ,

but in general Q >> Q , so in case of lack of information, a good approximation for this figure

GD GS

of merit is ≈ ∙

In the soft-switching scenario, the switch of the device happens performing a ZVS (Zero-

Voltage Switch), so there will no longer be a large influence of Q + Q in the performance of

GD GS

the device. I