Unwind di Analogue Integrated Circuit Design - 3 di 5

Analisi del circuito amplificatore

Il circuito amplificatore in esame presenta un'uscita differenziale definita come: ImaNoiVod ViImNoi TaToiD 20h2032e 2vidIVidGm Toi 203.

È possibile definire il guadagno differenziale dell'amplificatore come: ImitaVodAdama 2032Vid. È interessante notare che il risultato è simile al guadagno ottenuto nel caso di un comune sorgente polarizzata da uno specchio di corrente.

È possibile definire anche il guadagno comune dell'amplificatore dovuto agli ingressi differenziali, che è: Alda iVoc Voi 0Norta 2radVid. Questo guadagno è uguale a 0 perché quando gli ingressi sono segnali opposti, le uscite sono uguali in modulo ma opposte nel segno.

Consideriamo ora l'ingresso opposto, l'ingresso in modo comune: VideoVia Vicvii e. Il circuito diventa: 704RosMi MrraraVic Vic205.

Per semplificare l'analisi, è utile dividere la resistenza r05 in due resistenze equivalenti in parallelo il cui valore è il doppio di quello originale: 704RosMi rara MrVic Vic2205 2205.

In questo caso, le tensioni di ingresso aumentano allo stesso modo, quindi la tensione di sorgente di M1 e M2 non può essere considerata un riferimento di terra in corrente alternata.

more.Considering only the left half of the circuit: NoVic Imbitosi io roNgs Ngs Innings2205In this situation, the source terminal is not connected to AC ground, so the it must be considered body effect andthe factor gmb’: tie Vs Vbi Usb VbVsNgs Vb 0aConsidering the KCL at this node: iVoi Fm_vsI Imi 0Vic1 I 9ms e201201 203While at this node: iGm8mi _Vie 0Imbit Voi atzio t ooSumming the 2 equations, the result is: Voii0 vs Tos2e rzio te 703And going back to the secondo KCL: 8mi Vie 8miNo Smisi2705 Im29min20s a203 703701o o Im 701 Vic205Vor 28in 2205205201I tToit 703 703Finally, it can be written the common mode gain as:Im 701 205NoeAem 28in 22052052aVic 1 tToit 703703At least, it can also be defined the differential gain in respect of the common input:Ade Tod 0e VicThe gain is 0 because when a common input is applied, the inputs are equal in modulus and sign and this happento the output signals too, so their difference must be 0: iVodJo VoiTor 0oz Oe LESSON #10Let’s analyse

The single ended 5-transistor operational trans-conductance amplifier: LESSON #11

VbbMa 4VDB NII M Ma IzzIREE IB145146

In the circuit there are:

• An active current mirror that is defined "active" because it reacts to the changes of the input current;
• A differential pair;
• A bias circuit based on a basic current mirror operating in DC. It means that the CM (Current Mirror) is derived by a constant signal current, Iref;

The circuit can be represented as a box with 2 differential inputs referred to ground and a single output referred to ground: Vi 1 vvi 2

Let's consider now a fully differential input:

i ivii viceOvia oDvid

The behaviour of the circuit is the following. The input voltage variation creates a current variation that is reflected into the output branch using the active CM:

live1 eenid l'alsid itidaid NoDIFFPAIRVid vid2 2

At low frequency: id4=id3, so the total current that flows into the output node is:

it i28mi Vidid 8miididro n'diida 2

Lets consider only the output branch of the circuit: 702Ro Ton7044 Ro702 Ma vid2A current equal to: gm*vid, flows into the output node whose resistance is: Ro=ro2//ro4.The voltage gain is: VidRagni Gm RoRoV it Adamo

Let’s consider now the behaviour of the circuit at high frequency considering only the differential inputs:853 854 Colbie3 144Cdl ingolavia NoGdi Cdb CdbMi Mavid vid2 2In the circuit are evidenced all the parasitic capacitances due to the devices. Note that the parasitic capacitanceCgs1 is not considered because it only affects the input impedance but not the the gain.In order to evalute the voltage gain it’s useful to consider the equivalent Norton generator, so the output must beshorted to the ground.It’s also important to note that the capacitances Cdb2 and Cdb4 are connected between ground and ground sothey are shorted and neglected.The equivalent small signal circuit becomes: vaIIoIoiCA isImiti In Imita2la

Note that: ImaIma 1Sidis 8miNai il to 2034 2 GmSCAiTot 18ms1203 8ms i8mi 8mi tif s'en gin

Due to the fact that the devices M3 and M4 acts like an active CM: Ims8ms Imi 8mi 8mi Sid i8mi i Sig 2 SCAII t 8ms8msSCA In 8mL

It only remains the contribute of the device M2 that can be modelled as follow:Ima 8mi Imidee rfididVidIma 2

The total output current is: Imin is VidIda tiSCA2 I t 8msSCA SCAI I It t t IIm 9mi VidVid 8ms 28msSCA SCA2 I 1t t8ms 8msWÈE lupiWp 2finì 2fa.ms

This is the so called phenomenon of pole-zero doublet.

The plot of the modulus of iN in dB is:inInitialInitial2 NlogNzWp Zap

The behaviour is clear. At lower frequencies the current iN is ,ade of the superposition of 2 contributions, thecurrent id2 and the current id4. At higher frequencies, the current c]that comes from the device M1 is attenuatedby all the parasitic capacitances so one of the 2 contributions is highly attenuated.

To evalute the equivalent Norton generator, it

must be also calculated the equivalent parallel impedance by using 2 assumptions:

1. There still is an AC ground connected to the source of the device M2. This is a strong assumption because when it’s evaluated the output impedance, the differential input is turned off and a test voltage generator is applied between the output node and ground. This last type of signal is not differential, so the source of the device M2 should not be an AC ground anymore. However, the source of M2 is also connected to the source of the device M1 and the input impedance of the source of the device M1 is the reciprocal gm1’ that is a low impedance;
2. The gate of the device M4 is connected to an AC ground. This is another assumption that considers the fact that the gate of the device M4 is connected to the drain of the device M3 connected to ground with another low impedance that is the reciprocal of gm3;

The considered circuit is: Cd47044 zugoth 8h2alba 7oz Mi FaiRoRo coZn l

cdbztcdbgtlgdhtcgdzo.co2ozRo iRolo1 stThe equivalent model of the single ended 5-T OTA is: Èlico ce teliloin voroIt’s also considered an external load CL. The output voltage is:SCAI t VidiNo 8mi VidRo loin I 28msSCAsci Roll1 I st t8msThe differential gain is so: SCAI tImitoAdm S 28ms iRollSCA1 I stt 8msTipically: 8miSmecaCi 0,4 iSo: e8ms 8miciCaThe transfer function of the circuit presents so a dominant pole represented by: Ro*CL’, after which the the gaindecreases by -20dB/dec until the second pole increases this slope to -40dB/dec and at least there is the zero thatget the slope another time to -20dB/dec:idB1dm 5Into InCAI 29msWar Urali LoglaWere Wap ImitoAdamo IeiThe circuit presents a first-order frequency response up to the unity gain (and above).In integrated circuit language, a single stage amplifier is an amplifier that features a single high impedance node(single-ended or differential). This feature implies that is possible to design such an amplifier with

A dominant pole behaviour is usually found in a single stage amplifier. However, it is usually simple to guarantee this behaviour.

Another type of OTA is the telescopic cascode OTA (fully differential version) that is strictly related to the 5-transistor OTA: VbbMa 148DB 145 146VaNoµ 144143 reMaMq

The telescopic cascode OTA is very similar to the 5-T OTA but it presents a cascode current mirror instead of a simple current mirror and a differential pair (M1 and M2) with cascode devices (M3 and M4). At least there is the bias circuit that generates the current for the differential pair.

This configuration presents some advantages in respect of a simple 5-T OTA. For example, due to the fact that the output nodes of the device are connected to a cascode CM, the output resistance is much larger in respect of the output resistance of a 5-T OTA. The current that flows in the output node is the same but there is a larger resistance so the total.

output voltage is increased in respect of the output resistance of a 5-T OTA.

Let's consider now the bias circuit: VbbVbb Vbb Ma 148145 146IDs IDGtree tree

By properly modelling the mosfet devices, the currents ID5 and ID6 becomes proportional to the reference currents.

The AC behaviour of the circuit is the following: Isis I2oz 205707Rap tOstCopCop RapRap iIgnis Eos707 ICop dissi gals

Let's consider now the cascode part related to the differential pair: IREFµ114MaMirt rtHatree IB143 MqNtt iNMIREINIREF IDIB t REFD

If these 2 last partial circuits are putted together, the full equivalent AC circuit becomes: CopCop RopRap 114MaMi Ha

When the input is differential, the circuit is simmetrical and the common sources can be considered connected to an AC ground. Considering only the left side of the circuit, for example: CopRop MaMivid2

The equivalent small signal model is: I Giustozzi8mi MaCA CON CopMi Rapvid2

The device M3 acts like a common gate. Inside the source terminal there is

a small impedance while inside the drain node there is a high impedance (the device M3 together with the device M1 acts like a cascode current generator, so the equivalent impedance is high): E2 8miZoo