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Example of CM Application in DC

Let's have an example of CM application in DC: Vda Vda Vda VdaNeIREF MIREE MIMgMsIRETIRET.tl NotreMsMa Nature1441 µ Ns NÉ

The current "Iref" is a so called "gold reference current". Usually this type of currents are reference current that are generated with very high precision.

The parameters "N2", "N3" and so on means that the width of the device is "N2", "N3" and so on times the width of the principal device "M1".

We NAW iiWWs NLets consider now the small signal analysis of the CM:iim l'outTin dontM Ma

The ideal model of "M1", considering the shortcut between drain contact and gate contact becomes:

The voltage-controlled current source is in parallel with the voltage that controls himself, so IIgs it's equivalent to a resistor GmImages whose value is: 1/gm

When the drain of a mosfet is connected with the gate, the configuration is named

“diode” configuration.The CM becomes: l'outIim Iim e'outTin dont 1 toutlgsMrM tgsImi 8mFVorKin VorIm kri.W.VE knµaLIDS Kin W kmalVaIme Vorki ImVoti ikm2 NKm µµµ aaaImzvgszrfmzitinaN.fm Iim NimIm

Ideally, the small signal model of the current mirror is:lout1in Iim e'outTin dont I toutIgsM Ma NimIm

Let’s add now some parasitic components to study a more detailed analysis of the current mirror: D2Gi a.orgiim e'outGola CdbICostCgs tgCDB 201 7ozTg2Gm Image 52829 13

In this model it’s not considered the parasitic capacitance “CGD1” due to the shortcut between drain and gatecontacts. Moreover there are some assumptions that can simplify the analysis:Riz l RoI 1 2ozhai eIo a 8miImi 8Mi forestalircgsztc.GS CDB

The model becomes: DG cnn.coiim e'outGdrli CoRoRi toutTin Image 5282139

One of the possible model to analyse this circuit is to analyse the Y-parameter model:c'eio 9,2oz4,0iii 1o E411 4210 42241292

5292,0 i9221 t2IgmiiYue Slit sei tegolasegalarvi 052 ii scada4122 eJr viro Ima segala4212 ie ati Ero II segalaio la422 Slot tegola5e Ro 20252 giroSo model of the CM used at high frequency is: ione1 I toutSCgartout 422fmri scade JinIma I18mi tegola8mi sei seiitegola t 8mi202I I422 52ozCol Col5 CgdCgd I202Usually, these parameters are negligible.It’s so clear that the transfer function presents two poles that depends by the size of the devices used in thecurrent mirror, in particular depends by the factor “N”.Considering the behaviour at low frequency, so without the capacitances, the model is:iim l'out1Jin 2oz ToutIma NoiinThe low frequency model is important because the bandwidth of this type of circuit is very large, so thecapacitances are negligible also for very high frequencies.

LESSON #07
LESSON #08

PROBLEM 2
Consider the common source (CS) amplifier shown in the figure below, where the supply voltageV = 1.2 V, the source resistance R = 10 kΩ and the loadcapacitance C = 25 fF. Assume that V and VDD S L CN CP= |V | = V = 0.2 V. Then, consider the frequency response of the circuit A (jω)are chosen so that VDS1 DS3 OV v= v /v and:o s4) compute the low-frequency gain A = A (0);vo v5) compute the frequency f of the dominant pole;d6) determine the maximum and minimum value of the output voltage v for M and M to operate inO 1 3saturation.DATA µA,V = 1.2 V, I = 200 R = 10 kΩ, C = 25 fF, V = 0.2 V, L = L = 180 nm, W = 4⋅W , W = W ,DD REF S L OV1-6 1-6 3 2 5 3W = W .6 1Solution of Problem 2:VbbMa 143UcpMh 145 levoVen MoIREF Rs Mirt viQuestion 1: A 0 NoAvo e Vs WooDC equivalent circuit:VDB 800µAIeeeIssMa 143 E8mi 703705205Rap 203 tUcp 8mi 703705E4 145 RopIDsT.netEquivalent circuit comsidering the right branch of the CM as it’s output resistance:Rap146 145Rop zRs Mi 143Ts viSmall signal equivalent circuit at low-frequency:8mi6056 rocova RopNsgVi 201ImitiTo simplify the circuit, let’s evalute the Norton

equivalent generator at these nodes: RapRonin

Let’s evaluate iN: 556Gingillo 706 in 8in6056 206ioUso Imiti701Imiti Tsg Tsg i8mi6056io 206 Io 706Imiti8mi fino

The only element that erogate current is the controlled generator, so the Norton current must be: 8mi viin

Let’s evaluate now the Norton equivalent impedance turning OFF all independent generators: 0via

The equivalent circuit is: RON Gingillo 706 visto701

The impedance is the same as the output impedance of a cascode CM: E i201 706finita206 706tfmir.caRON ta

To evaluate now the output voltage, it is considered the following circuit with the equivalent Norton generator: Roz Row RapRapRonin RoiVor ImIm AvoRotti Vovi

The values of gm1 and gm6 must be the same because the devices M6 and M1 are the same and have the same Ids current (similarly for devices M3 and M5): 2i 9,6MImo Im ImuSimo 8mg Img i ae2 4820oz kiliIo e IIn i8msIn 9 Gmit Sembra5 Kili3703Rosa 38 IsisInvito 109kt58,8kt20610Ron 205203Ropae aRo ri38,2kRon Ropaa V V306Im RozAvo

Here is presented a first important result. In fact using a normal P-Current Mirror, the voltage gain cannot be so high, while, thanks to the cascode configuration, the output resistance grows-up significantly and consequently is significantly grows-up the voltage gain too.

Moreover, let's consider the previous Norton transformation and lets consider the devices M1 and M6 ideal: In a very general way, once the output node has been identified it can be computed the output resistance Ro and Ro to determine the voltage gain at that node it simply must be multiplied the transconductance factor of the vi driving device (in this case M1) for the calculated output resistance.

Question 2. Let's evaluate now the frequency of the dominant pole. The AC circuit is:

ll146 145Rs Mi 143Ts vi

Let's add now all the parasitic capacitances connected to the output node O and the capacitances that the signal encounter along its travel path:

Cgd CGD5l'Dsg llRo CDB5BG 145146Gsg MsGD iosRs

CSBCnrs 6Mirt vi cosiIt’s important to focus on the travel path of the signal:

  1. The signal starts its path from a variation of the input vs. In this case the input voltage of the device M1 is different by vs due to the parasitic capacitances Cgs1 and Cgd1. This doesn’t happen in the low-frequency behaviour because these 2 capacitances are negligible. The RC circuit acts like a voltage divider so as a low-pass circuit. Due to this vi is smaller than vs and presented a phase shift;
  2. The variation of the input voltage vs (and consequently vi) changes the ids1 current. At this point must be considered also the capacitances Cdb1, Csb6 and Cgs6. All the capacitances connected to the node A acts like a low pass filter;
  3. At least the variation of the current ids6 generates the variation of the output voltage;

Let’s analyse the circuit considering one node at time. Starting from the input, the considered portion of the circuit is: RsTs ViNdsGs iGD t Tgs

Due to the fact that Cgd1

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is connected between input and output nodes of the device M1 it presents Miller effect.The low-frequency voltage gain factor can be determined using the following circuit:

Zing l206 finge ifine 1 viImitava gm.roVossMi 1Tor finebiovasivi E Gm ViGino iGmODS eOi GinoDEVICE M6I Nds5 GS iGD tVi Vs TgsiRs t Nds5 GS iGD t TgsI5 Gs iGD t ImiSRs Cost1 I iGDt tFmicost Ginos iGD t Gino1 FmiSRs Costi iGDt t Gino Efa 462MHz i1 FmiIrs2 cost iGD t Gino

Another advantage of the cascode configuration. In fact the load of the common source stage corresponds to theinput impedance of the common gate stage, so the Miller effect must be reduced by this input impedance.

Let’s consider now what happens to the node A: Zig 706 Inibito1Gattoni CGS6tcsr.to101Imiti 96 fintoDEVICE M6Zig 1Gm'sImiti lasto Ìogli gliaG Cosaccos riiGm ifin Gattons 6561151366 fine èfa GHzI 34,61Un2 Gatton tcgsbtc.BGfino

At least, about the output node O: Cassgag llRo CDB5BG146 RoniCGDGTCDBgtcdbgtCGDg.ro Rapao

NoCotaMa Roidb iIfaVa Ro MHz1 37Idb 81a aCi CiRoCat Cot2KsThe lowest pole is the frequency fo so it corresponds to the dominant pole.In synthesis, the cascode configuration can increase the low-frequency voltage gain significantly, can increasethe cut-off frequency of the input low-pass filter but the pole at the output node is lower due to the increased (inrespect of a common current mirror) output resistance of the circuit.Question 3.Let's consider the large signal model of the circuit: 200mVtrovaVod143 V.vUsaUcp 145 Via.INNo 2kVNovVascoVen 146 NovNovVas14 0The vds voltage of all devices must be equal to the over voltage, so can be easily derived:Vor Vor 400mV2 VaNoVasco Oo si 800mVVor VorVorVar 2UnaOoovisse DoNote tha
Dettagli
Publisher
A.A. 2021-2022
44 pagine
SSD Ingegneria industriale e dell'informazione ING-INF/01 Elettronica

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher m.lombardo95 di informazioni apprese con la frequenza delle lezioni di Analogue integrated circuit design e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università Università degli Studi di Padova o del prof Neviani Andrea.