Unwind di Analogue Integrated Circuit Design - 1 di 5

Formattazione del testo

SRII t scad 8nsri ricom i i SEIImSri sbtc.GSSRI Cod RiCsitI 5itSubstituting “s” with “jw{, the result is: juiced8ns Ri JWi IAviv ie_AvoGm Wze tjwricsbtc.GS JW1i WpRi i8m70 i 8miIm Nila WpaWz 1Avo ee CGDRiCGD spotTipically:ri Nzi WpImThe Bode diagram of the transfer function becomes so:tu inAvo alle20dB Wiz WlogWiWpThe amplification appears only for frequencies below “wT”. Considering what happens for “w” that goes toinfinite, the transfer function becomes:JW1Avotv tv Wp 1in inWzr WzJ W Wi WpFor increasing frequencies, the output voltage is attenuated in respect of the input voltage variation.Lets now consider some non idealities about the voltage that drive the circuit:Now the voltage “vgs” is different by the voltage “vI”. The voltageVbb “vI” sees a voltage divider that creat the voltage “vgs”. Thevoltage divider is composed of the resistance “RI” and the inputRi impedance named

“ZGS”.2GsR ioÒ vos

To determine the new voltage gain, lets firstly determine “ZGS”, comsidering the following circuit:

igaGD IIs 22 id GsGsR 2 RICostToZIigsÒ vos Cos

Let’s consider in particular a test voltage “vt” applied here and let’s measure the ratio between “vt” and “it”:

igsrscosotiigdescado.toiOz AvJo JasVos sa eCas Av its i sa1 gol

Considering small frequencies, where “Av(s)” is constant, the expression of “igd” becomes:

iW fmriWp Wz AvoAv s a efmriigdzsc.es vii Miller’s effect.

In the last expression is evident the Miller’s effect. In fact when “vgs” increases, the output voltage decreases and the difference between “vgs” and “vo” is exactly the voltage drop across “CGD”.

For this reason, the value of CGD cannot be neglected also if is very smaller than “CGS”.

The final expression the input admittance is:

fmriConCost iGs if sae issofisidazig

Putting everything together and writing the expression of “vo” considering “vI” as input, the result is:

A S rAvS.ZosrAvS.irZGstRe e co I TRI Gszscab8ns Ri i Gm 1 asbtCGD.lt fmriCoastSRIRi I5i t EDscabIm ri i gun fmrisbtCGD.fi CoastSRIRi I5it ED

In the final transfer function are evidenced the transfer function in respect of “vgs” and the part that depends by the presence of “CGD”.

In a more compact form, the transfer function becomes:

JU JUI IAA in WzAv WRAvoadei iJU JWIt'wIt'w I WpWpWp WpWzi8mAAva Wp 1a efama fmriConRI Cost iLupa sbtc.GSri

Tipically the value of “RI” is in the same order of magnitude of “RL’”, and considering:èMI cos CDBtempiRI Cosi

It happens that:

lupaWp

Another single stage mosfet amplifier is the common gate (CG) stage, here represented:

RiToi RI Va

In this configuration, the gate is common to the input and output ports.

In this configuration is

Il voltaggio del gate è a un valore costante, chiamato "Vg" e di solito rappresentato da una batteria. Ci sono alcune tecniche per ottenere un valore costante del voltaggio al gate. In questa configurazione di solito si considera un generatore di segnale rappresentato da un generatore di corrente con la sua resistenza intrinseca "RI". Questo è il cosiddetto generatore equivalente di Norton. Non è molto importante quale tipo di generatore di segnale viene considerato perché in ogni caso è facilmente possibile ottenere l'altra configurazione, il generatore equivalente di Thevenin. Il circuito equivalente in corrente alternata, considerando il modello ideale del dispositivo, è: Rii ToRI its Di solito, quando "vgs" aumenta, anche la corrente "id" aumenta: O Jsii its Gmos ogeJags A causa del fatto che vg=0, c'è una corrente decrescente, rappresentata da "id". Quindi in generale una variazione di "vs" genera una variazione di corrente che va dalla sorgente al dreno: iài riRIToitsThe output voltage is: 8MOo OsiReid Rer eThe voltage gain becomes:Ava Im RiJoe aOs low fredAnother consideration about the current generator. If the intrinsic resits “RI” is infinite, than the current erogatedby “iI” flows through the source contact, through the device, through the drain contact and at least in the load.It’s clear that the device in this config acts like a current buffer, because input and output currents are equal (or atleast very similar).Let’s see something about some figure of merit of the mosfet.First of all, let’s consider the “intrinsic gain”. The intrinsic gain the maximum voltage gain that the device whenit’s driven with an ideal voltage source and is loaded with an infinite resistance: LESSON #04i21 L8ns 2hL2 lGo LIlIs2oza r V.vKrisVor IsIm 2 Id iVotiL20 IsThe intrinsic gain is directly proportional to the lenght of the channel. Due to this, when an amplifier have to bebuilder with integrated mosfet,it’s not used a very short channel. Tipically the smallest channel lenght used isabout 28nm. Tipically: 28mmCl LIFor example, let’s consider this situation:i risommiil miio'llIs 200mV Manove i1mA iaIma 2LID ML Kai10M e rVor JDImCla 201a eTo get a better intrinsic gain, it should be used a lomger channel or it should be used a smaller “Vov”, but not toomuch, due to the fact that the device has to remain in saturation region.An important concept to know about input and output resistance is the value of the “high impedance” and of“low impedance”. Usually an impedance is high when it’s in the same order of magnitude of “ro”, while animpedance is a low impedance when it’s in the same order of magnitude of the reciprocal of “gm?”:IoR GH IMPEDANCE111 iR't i IMPEDANCELOWInThe ratio between the definitions of high and low impedance, gives the value of the intrinsic gain:lo IImR Lo 1zooe eR lAnother

important intrinsic parameter, is the transit frequency. This is the frequency where the ratio between the8mWoutput and the input current is equal to 1 (it’s useful to consider the a costante voltage Vds):i A JWT JWT 1ioeio JWTiiE 8ns8nsUtaVas Cost CosCosiILet’s have a numerical example on this parameter, considering an N-mosfet (the calculations would be the samewith a P-mosfet): i Istantitaxi vai180 0,2N casalasco9mm 1500 ateme mm 0.32ftTo evalute “wT” using these parameters, it must be calculated “CGS” and “CGD”:Wh W iCox Casocos a WCost ilodoIn this case, the value of “W” is unknown, but it can be determine from the saturation current of the device:VoiIs µe tengaNow the unknown parameter is the oxide capacitance “Cox”, that is: iEEaxEoCox Eroi là 11,9111,9111,91a e a Ifa famintaxtaxEra E E F8,85E io M3,9EraVoi E 15We iMnIs item2L EDµa Ox timeoutWh W E 26,4 FFICox Casocos a Eè W i4,83

flodo FGDIt can be seen that numerically, the capacitance “CGS” is very larger in respect of the capacitance “CGD”. This happens due to the fact that the overlap capacitance is equals for both, but in “CGS” there is another contribute that is related to the gate capacitance and this contribute is larger than than the overlap capacitance. This larger contribute is given by the operative region of the device, that is the saturation region.

This is the reason why the cut off frequency can be approximated and can be seen as only dependent by “CGS”:

InUt 8MCgsGdcos t Cgs Cga

In this case, “wT” numerically is: EWt 2Im Iss E S320,16rade eCostVor CGDGdcos t50,95GHzE 2T

Let’s for example find a way to double the cut off frequency:

ÈW i2 Wta coffee Costi cosWWh lodo WCost CGD Cox Caso ta t a2 WtalodoCox µµVIII tCasotti lodo WhCox Caso t

For example, to double the cut off frequency, it can be used a different size of the

width of the channel. In particular it can be used a width that is the half in respect of the original one.

Now “wT*” is: GmNÉ a lodo WhtCox Caso tE iE 2T 2W640,1 Grad 101,88GHzS a 1

Lets consider now the common gate stage (CG stage):

DARs ToOs Va

This stage is called “common gate” due to the fact in his AC model, the gate is common to the input and output port. In fact the DC voltage that polarise the gate is a short cut in the AC model, so the gate becomes connected with the reference. This type of reference is called “AC ground”. Something similar happens to “RD” that becomes connected to the drain contact of the device and to the AC ground. The equivalent AC model becomes:

JoRsTsg

Let’s have a simplify analysis, using the ideal model of the mosfet: idTgs JdsOds ImpsTgs

In the ideal AC model of the device, there are no capacitance or resistor (all parasitic capacitance and the output resistor “r0” are neglected).

Important thing that cannot be neglected of the device is the connection of the bulk terminal in the circuit. Usually the bulk terminal is connected to the source, so in the previous circuit (CG stage) it shout be connected to the reference (in a P-mosfet, the bulk is connected to the power supply voltage).