Appunti Electronics systems (parte 6)

Let's example

assume an :

avoids

This disturbing other

· cells .

(Floating-gate MOS)

The Tunnel-Oxide because

from

type

second which

· differs

FLOTOX

is FAMOS :

the floating drain

the

extends

gate over .

layer

thin

by

separated

it oxide

is very .

a

This avalanche Let's

tunnelling

· enables quantum instead of

of insection Flotox in

see case :

.

,

(tunnel effect)

Programming

1. Vo = Upp

Vs

.

ii = 0 from

the channel

tunnel through oxide

electrons thin gate

the floating

the

into

iii .

.

Because oxide

the thinner needed

lower

is is

energy .

,

(

(tunnel

Erasing effect again

Vo =

1. ·

Upp

Ve =

ii. tunnel from the back

floating

electrons drain

the

to

gate

.

iii .

So unlike electrical

EPROM

UV is

easing

, .

,

EEPROM

· is :

based transistors

FLOTOX

on . fuse

ideally PROM with instead of

FLOTOX MOSI

a .

,

He defining

· feature : hence

electrical the Erasable

Electrically PROM

erasing is .

name

, chip

whole

selected not the

only erased

cells are

Let's the architecture

· of

ideal erasing

in programming

see case and :

Vpp 3

=

영 i ↑ ↑

erasing crasing

ㅇ programming

programming

"

To both

· solve and disturbi

write crase

two

each transistors

cell uses :

memory

1 FLOTOX

.

i trancistor

1n-MOS

ii. pass .

. which

selects

Seli signal

The This

exactly connected.

cell

· is :

selected erased

programmed

Only the cell is or .

other electrically .

All cells isolated

are 、

In architecture following table

real to the

according :

,

a gnos

Seli Bly

WLi ,

,

, ,

> to li.

other

all

refer

.

nes

Operations :

Program ) connected")

others

selectively impedance

High

apply Vpp

Vec "not

z

in meaning

: ,

, . .

Erase appropriately

voltages

swap

:

Read standard output

low-voltage operation Q.

: ,

110 Lecture the latest technologies

Flash represents evolution of ROM

Memory .

In flash CFGMOS)

floating

implemented

each gate

· with transistor

cell MOS

is

memory

memory a ,

, simple

the transistore

transistor Whereas rely

earlier

Flash

specifically ROMs either MOS

on

,

anti-fuses

fuses

on

or .

technological

From point Flash of

· evolution EEPROM

of is

view :

memory an

a ,

the principle the floating gate

with

transistor

MOS

is same : a .

electrical Without light

erasing fully UV

programming are

and , .

Flash introduces which

but cost

density

important and bit,

advantages speed

mainly in ma

per

,

, , ,

storage

for

suitable

it

Ke massive .

The flash

application such

· non-volatile drives and

of storage USB

main is massive as

memory ,

Like be

SSDs but classical and

retains it

unlike written

without

data

ROM it ROM can

power

. ,

a , through

multiple times

rewritten operations

+

erase program .

However Flash CRWM)

Read

cannot considered because physical

be

· waiting

true Waite Memory is

a ,

, the

ly and

oxide should

Ideally

the device

disruptive damages support

slowly RWM

it stresses

: an

,

. cycles

limited

whereas

cycles has

Flash still

the number

write endurance of

infinite if is

even

, ,

high .

very

The characteristics

the

Flash

· Transistor another by and

of

obtained

FGMOS FLO

FAMOS

is merging

, .

TOX . ·

two

Comparing Flash features

· defining

and

FAMOS FLOTOX see

can

we :

, ,

Symmetric floating where the floating closer the

to

gate drain

unlike

gate

.

1 FAMOS is

: ,

,

positioned This

symmetrically between drain

floating gate

Flash the im

is

in source and .

and reliability

uniformity

proves . oxida

compared the

floating

thin between

Very and under

oxide

.

2 to

substrate

gate FAMOS

: ,

the his

tunnelling

much allowing

floating thimer the when

electron oxide

through

gate is ,

gh fields applied

are .

This tunnel

structural both

Flash for and

· allows to effect

compromise erasi

programming

use τ

while

like assisted

drain

but also exploiting to

similar

FLOTOX FAMOS

programming

ng - , .

, ,

Both with bias

tunnelling but

quantum conditions

operations rely

· different :

on , gatel

Programming (election floating

into

insection

exactly like

Vo Vo Upp FAMOS

= = .

,

VsuB O

= (not

floating

left connected

the

Vs Z is

meaning

= source

, here becau

don't

electrons sump

the insulation

~ thicker

se is

electrons

these

With

· voltages tunnel the

drain and

sufficient the into

gain near

energy

,

floating threshold

the

gate voltage

increasing

, .

/electron .

Erasing from

removal floating gate)

Va = 0 Vpp

VsuB =

Vs Vs z

= = electric field

Now

· the the

from back

floating substrate

elections throu

the

gate

pulls into

thin lowering

the

gh the threshold

oxide voltage .

, (WL)

Flash how and lines

bit

to

connected

differ lines

word

· transistors

mainly in

memory are

The two

(BL) categories are :

.

This Flash while

Why

explains

· and

drives Flash embedded

used

NOR

NAND

SSDs

USB in

is by

use ,

Let's look

stems firmware take to architecture

for Flash

NAND

a

. the

In

= architecture each

NAND of

column string

is

, a

Flash connected

transistors in series :

lines

Who Word

WLp :

, ..., .

Blo bit

BLm lines

:

, ..., .

Line)

(String Select transis

drives the top

SSL : pass

(n-MOS)

tor .

/Ground Line) bottom

Select the

GSL drives

: pass

(n-MOS)

transistor .

A typically

string transistors

contains cells

all the

to

· corresponds to connected to

198

32 came

page

a

, which for

block crucial

includes

and substrate

and the

shares

WL is enase

same

pages opera

many

a ,

tions .

Like

· need to

FGMOS

any we :

,

Choose V

such that

Up VR

V programmed)

I

If erased

the transistor

not the circuit

turns

cell short

. ON

is

i I .

,

the

If cell programmed transistor

the .

remains

is

ii circuit

Off

. s open

,

Additionally bypass

· exists

voltage Vpp :

, a forcing transistor

the always

V

Vsp ON

> ,

This bypass

essential unselected

to cells

is

during read program .

Flash

NAND With

· operates :

by

Read page .

by

Program .

page

by

Erase page . example

Let's for

This fundamental behavior

and

asymmetry

· explains performance

is assume an

.

each operation :

Program by

.

1 page Biasing

E : bottom selector

GSL V

0 OFF

= = .

top

Vcc selector

SSL .

" ON

=

Upp to all other

Upp

cells

WL of program

on on

,

WLs of

Upp other

cells to

BL BLs

OV

program

on on .

,

In the diagram electrically

the enabled string

· the

because keeps

condition GSL iso

programming is

, So

lated by

, unintended multiple

preventing conduction cells

program means program

can

page you

,

.

different

the not

but

in in

same page .

pages

,

E by

Erase page

. Biasing

=> : V disconnected

OV

GSL strings

SSL all

O :

=

= ,

all

OV WLs .

on

Upp substrate

the

on .

Because block

block the

the substrate the

all

· erased

cells entire

share simultaneously

is

in ,

block

This the

Why granularity

is is

erase .

Read by

3

3 page Biasing

=> : Vec

6S Vec SSL =

= , to

the

Vp of .

WL

on page read

other

all

VBp WLs .

on

Vac all BLs .

on

a

two

Let's analyze

· cases : 0

10

reading cell

Case 1 ,

: 0)

(0 11 1)

and

Cells programmed

are

, .

,

The 0)

10

diagram because

highlights that programmed s transistor

down

pulled

Blo is

is ,

logic

conduction path .

'I'

OFF > :

no 0

(1

reading

Case cell

2 : , .

0) (not

(1

Cell crased programmed)

is

,

Blo

Now through pathologic

discharges the conducting o

Data

A Flash before

impossible

· blocks not just

contains overwriting is Writ

memory many one :

.

,

ting block

whole

the .

data be

must erased

new ,

each

For write : block

entire

the

erase . by

block

the time

at

WL

one

program page page a .

,

In terms flexibility

· of and

cost : be

cannot

transistor manufacturing

.

1 cells

not modified

ROM all after

in .

: ,

transistor fuse entire

PROM cell

.

2 + one memory

: one crase

EPROM

3

3 transistor by

cell cell entire

one crase

program

per

: memory

, .

,

4

. transistor by

transistors

Flash cell by

strings cell block

one per crase

pass on

: program

+ .

, ,

I

two transistores highest

by

5 highest

call

EEPROM and cell flexibility

: erase

per co

program

. ,

,

)

st .

This explains speed

density flexibility

between

Flash's position and

compromise

unique : a , ,

o Lecture

1 Memory)

/Random

With term to

that

to direct

refer

the

· RAM allow

Access memories

we access

the

With physical ty.

independently of RAM

location time position

its is

same access ,

any memory .

fundamental

characterized two properties

by

pically .

First IRWM) both

be

that

Read

RAM retrie

stored and

data

and Memory

Write meaning

is can

a ,

, which

red volatile that when

during removed

Second

freely RAM the

operation is

is power

means

. , ,

,

stored lost

information is .

It important clarify frequent Flash

· and

to EPROM

confusion EEPROM

of

is memories

source :

a , , devices

they

similar because

could those

rewriting

to allow writing

However

RWM in

.

appear , ,

by

followed which

to

corresponds operation

disruptive redu

and

is

reprogramming

erase , a

an degrade the

lifetime

the device structure

not

does

it

meaning .

ces memory

,

From classification perspective divided into

· RAM is :

a ,

:

(SRAM) the

Static long

RAM without

maintained

content supplied

is

is

memory power

as

as ,

refresh operations

requiring .

:

(DRAM)

Dynamic powered

when

RAM periodically

stored must refue

be

the information

even ,

shed charge leakage

last to

otherwise due

it is .

,

This distinction focusing

for the

which subject

· rest the

specifically

stage the of

the

sets SRAM of

is

on ,

discussion. bistable

The fundamental block which

building of circuit

the cell

SRAM is

· is memory a .

,

bistable two-closed feeds

A realized where inverter

loop each

system

· inverters

is using ,

other feedback

the loop

the

input creating

of positive

a .

,

Because has

the

structure cell two stable

this only states

and