Appunti Elettronica analogica sui BJT - Parte I

Appunti: Microelectronics (B. Razavi,

4 BJT

Wiley 2014) Capitolo

Parte I

BIPOLAR TRANSISTOR 8

HEAVILY

DOPED

II

EE fast

S

EE.EE

S in

rise OBV

VBE

V E

EEE.EEE.EE EEEEEE

BASE IS THIN VOLTAGE

SUSTAINING LOW

Entered Diffusion

Mostly

Is

VBE Ic

fiff Iste kE i

si Is Affffth

Ic 60mV

BET 10X

Ic

HE East SOURCE

CURRENT

VBEVCEIP.PE ETIIEIIEI IEEE some

Ic BIB 50 GAIN

200

BE CURRENT

If

Is

It IctIB exp

Bff

FEW VS

INSIGHTS REVERSED

FORWARD RELATIONS

4 FEE IEEE EE

EE.E. IonwanD

EE

REGION

IIInecost

IEEEE.EE Full BIT MODEL I

IE

Ic ICC

IB f ÉÉÉe

ÉÉ

went

E on EEL.IE

A E

4

VBCO

VBCCO KEYES

FEET

VBECO FIFTEEN TEEESTED

SATURATION

VBESOEE.EE

VEVEE O.t

VBCEVBE VE.AT

BIT CAPACITANCE CID CU

NB

DIFFUSION GIUNZIONE CIT

CD IF IF

BE Cu

G fifty

Be

Cu C

Mt

II E

TRANSISTOR BIASING

E.IYEEEEE

EFFE.IE IEEEEIS.EE TEEnss

RIGHT

FIND AMOUNT mgyffÉfÉft m

gm E vacost IF

PCff

If BEIC

DURING VE BE

gm KEPT CONSTANT

MUST

BIT SIGNAL

SIMPUFICATION

MODEL LARGE B

exp

IB If

If

TEEEIFEE.rs eE HEELC1

SMALL SIGNAL t

ExPU

ISEXP

Ic

are sonar the Is es

VuusinfwE B

EN I 8

t

IcotgueVusiu SCOPE

c LINEAR

IEIEEEEM.IT APPROXIMATION

Is ITaaIEES

ftp.t

SMALL SIGNAL MODEL VOLTAGE

Pgm

MI Current

e

f SOURCE

gun Ifpe constant

f9uVnt

effort SH CIRCUIT

open area

VCE

EARLY P Ic

EFFECT DEPUTION GOT

DENSITY SLOPE

WE

Ic Is ftp.FI ggggggggd

VA EARLY VOLTAGE me

for

A Feb

8 If

Sue

VCE Rtc Fue If

ft Is

AIC Is

Ict ya

exp

we 7

57 to

403 2

1

guto

N.BE LE YE

IsexP VII

Is

VCE

VAD Ic

IF exp