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# MIPS Instruction Set Elenco di tutte le istruzioni, le pseudoistruzioni e le direttive del MIPS, spiegate dettagliatamente. Appunti basati su appunti personali del publisher presi alle lezioni del prof. Danese dell’università degli Studi di Pavia - Unipv. Scarica il file in formato PDF!

Esame di Calcolatori elettronici docente Prof. G. Danese

Anteprima

### ESTRATTO DOCUMENTO

DIVision Unsigned : Set $t1 to ($t2 divided by 32-bit immediate,

divu $t1,$t2,100000 unsigned integer division)

Load floating point Double precision : Set $f2 and$f3 register

l.d $f2,($t2) pair to 64-bit value at effective memory doubleword address

Load floating point Double precision : Set $f2 and$f3 register

l.d $f2,-100 pair to 64-bit value at effective memory doubleword address Load floating point Double precision : Set$f2 and $f3 register l.d$f2,100000 pair to 64-bit value at effective memory doubleword address

Load floating point Double precision : Set $f2 and$f3 register

l.d $f2,100000($t2) pair to 64-bit value at effective memory doubleword address

Load floating point Double precision : Set $f2 and$f3 register

l.d $f2,label pair to 64-bit value at effective memory doubleword address Load floating point Double precision : Set$f2 and $f3 register l.d$f2,label($t2) pair to 64-bit value at effective memory doubleword address Load floating point Double precision : Set$f2 and $f3 register l.d$f2,label+100000 pair to 64-bit value at effective memory doubleword address

Load floating point Double precision : Set $f2 and$f3 register

l.d $f2,label+100000($t2) pair to 64-bit value at effective memory doubleword address

Load floating point Single precision : Set $f1 to 32-bit value at l.s$f1,($t2) effective memory word address Load floating point Single precision : Set$f1 to 32-bit value at

l.s $f1,-100 effective memory word address Load floating point Single precision : Set$f1 to 32-bit value at

l.s $f1,100000 effective memory word address Load floating point Single precision : Set$f1 to 32-bit value at

l.s $f1,100000($t2) effective memory word address

Load floating point Single precision : Set $f1 to 32-bit value at l.s$f1,label effective memory word address

Load floating point Single precision : Set $f1 to 32-bit value at l.s$f1,label($t2) effective memory word address Load floating point Single precision : Set$f1 to 32-bit value at

l.s $f1,label+100000 effective memory word address Load floating point Single precision : Set$f1 to 32-bit value at

l.s $f1,label+100000($t2) effective memory word address

la $t1,($t2) Load Address : Set $t1 to contents of$t2

la $t1,-100 Load Address : Set$t1 to 16-bit immediate (sign-extended)

la $t1,100 Load Address : Set$t1 to 16-bit immediate (zero-extended)

la $t1,100($t2) Load Address : Set $t1 to sum (of$t2 and 16-bit immediate)

la $t1,100000 Load Address : Set$t1 to 32-bit immediate

la $t1,100000($t2) Load Address : Set $t1 to sum (of$t2 and 32-bit immediate)

la $t1,label Load Address : Set$t1 to label's address

la $t1,label($t2) Load Address : Set $t1 to sum (of$t2 and label's address)

Load Address : Set $t1 to sum (of label's address and 32-bit la$t1,label+100000 immediate)

Load Address : Set $t1 to sum (of label's address, 32-bit la$t1,label+100000($t2) immediate, and$t2)

Load Byte : Set $t1 to sign-extended 8-bit value from effective lb$t1,($t2) memory byte address Load Byte : Set$t1 to sign-extended 8-bit value from effective

lb $t1,-100 memory byte address Load Byte : Set$t1 to sign-extended 8-bit value from effective

lb $t1,100 memory byte address Load Byte : Set$t1 to sign-extended 8-bit value from effective

lb $t1,100($t2) memory byte address

Load Byte : Set $t1 to sign-extended 8-bit value from effective lb$t1,100000 memory byte address

Load Byte : Set $t1 to sign-extended 8-bit value from effective lb$t1,100000($t2) memory byte address Load Byte : Set$t1 to sign-extended 8-bit value from effective

lb $t1,label memory byte address Load Byte : Set$t1 to sign-extended 8-bit value from effective

lb $t1,label($t2) memory byte address

Load Byte : Set $t1 to sign-extended 8-bit value from effective lb$t1,label+100000 memory byte address

Load Byte : Set $t1 to sign-extended 8-bit value from effective lb$t1,label+100000($t2) memory byte address Load Byte Unsigned : Set$t1 to zero-extended 8-bit value from

lbu $t1,($t2) effective memory byte address

Load Byte Unsigned : Set $t1 to zero-extended 8-bit value from lbu$t1,-100 effective memory byte address

Load Byte Unsigned : Set $t1 to zero-extended 8-bit value from lbu$t1,100 effective memory byte address

Load Byte Unsigned : Set $t1 to zero-extended 8-bit value from lbu$t1,100($t2) effective memory byte address Load Byte Unsigned : Set$t1 to zero-extended 8-bit value from

lbu $t1,100000 effective memory byte address Load Byte Unsigned : Set$t1 to zero-extended 8-bit value from

lbu $t1,100000($t2) effective memory byte address

Load Byte Unsigned : Set $t1 to zero-extended 8-bit value from lbu$t1,label effective memory byte address

Load Byte Unsigned : Set $t1 to zero-extended 8-bit value from lbu$t1,label($t2) effective memory byte address Load Byte Unsigned : Set$t1 to zero-extended 8-bit value from

lbu $t1,label+100000 effective memory byte address Load Byte Unsigned : Set$t1 to zero-extended 8-bit value from

lbu $t1,label+100000($t2) effective memory byte address

Load Doubleword : Set $t1 and the next register to the 64 bits ld$t1,($t2) starting at effective memory word address Load Doubleword : Set$t1 and the next register to the 64 bits

ld $t1,-100($t2) starting at effective memory byte address

Load Doubleword : Set $t1 and the next register to the 64 bits ld$t1,100000 starting at effective memory word address

Load Doubleword : Set $t1 and the next register to the 64 bits ld$t1,100000($t2) starting at effective memory word address Load Doubleword : Set$t1 and the next register to the 64 bits

ld $t1,label starting at effective memory word address Load Doubleword : Set$t1 and the next register to the 64 bits

ld $t1,label($t2) starting at effective memory word address

Load Doubleword : Set $t1 and the next register to the 64 bits ld$t1,label+100000 starting at effective memory word address

Load Doubleword : Set $t1 and the next register to the 64 bits ld$t1,label+100000($t2) starting at effective memory word address Load Doubleword Coprocessor 1 : Set$f2 and $f3 register pair ldc1$f2,($t2) to 64-bit value at effective memory doubleword address Load Doubleword Coprocessor 1 : Set$f2 and $f3 register pair ldc1$f2,-100 to 64-bit value at effective memory doubleword address

Load Doubleword Coprocessor 1 : Set $f2 and$f3 register pair

ldc1 $f2,100000 to 64-bit value at effective memory doubleword address Load Doubleword Coprocessor 1 : Set$f2 and $f3 register pair ldc1$f2,100000($t2) to 64-bit value at effective memory doubleword address Load Doubleword Coprocessor 1 : Set$f2 and $f3 register pair ldc1$f2,label to 64-bit value at effective memory doubleword address

Load Doubleword Coprocessor 1 : Set $f2 and$f3 register pair

ldc1 $f2,label($t2) to 64-bit value at effective memory doubleword address

Load Doubleword Coprocessor 1 : Set $f2 and$f3 register pair

ldc1 $f2,label+100000 to 64-bit value at effective memory doubleword address Load Doubleword Coprocessor 1 : Set$f2 and $f3 register pair ldc1$f2,label+100000($t2) to 64-bit value at effective memory doubleword address Load Halfword : Set$t1 to sign-extended 16-bit value from

lh $t1,($t2) effective memory halfword address

Load Halfword : Set $t1 to sign-extended 16-bit value from lh$t1,-100 effective memory halfword address

Load Halfword : Set $t1 to sign-extended 16-bit value from lh$t1,100 effective memory halfword address

Load Halfword : Set $t1 to sign-extended 16-bit value from lh$t1,100($t2) effective memory halfword address Load Halfword : Set$t1 to sign-extended 16-bit value from

lh $t1,100000 effective memory halfword address Load Halfword : Set$t1 to sign-extended 16-bit value from

lh $t1,100000($t2) effective memory halfword address

Load Halfword : Set $t1 to sign-extended 16-bit value from lh$t1,label effective memory halfword address

Load Halfword : Set $t1 to sign-extended 16-bit value from lh$t1,label($t2) effective memory halfword address Load Halfword : Set$t1 to sign-extended 16-bit value from

lh $t1,label+100000 effective memory halfword address Load Halfword : Set$t1 to sign-extended 16-bit value from

lh $t1,label+100000($t2) effective memory halfword address

Load Halfword Unsigned : Set $t1 to zero-extended 16-bit value lhu$t1,($t2) from effective memory halfword address Load Halfword Unsigned : Set$t1 to zero-extended 16-bit value

lhu $t1,-100 from effective memory halfword address Load Halfword Unsigned : Set$t1 to zero-extended 16-bit value

lhu $t1,100 from effective memory halfword address Load Halfword Unsigned : Set$t1 to zero-extended 16-bit value

lhu $t1,100($t2) from effective memory halfword address

Load Halfword Unsigned : Set $t1 to zero-extended 16-bit value lhu$t1,100000 from effective memory halfword address

Load Halfword Unsigned : Set $t1 to zero-extended 16-bit value lhu$t1,100000($t2) from effective memory halfword address Load Halfword Unsigned : Set$t1 to zero-extended 16-bit value

lhu $t1,label from effective memory halfword address Load Halfword Unsigned : Set$t1 to zero-extended 16-bit value

lhu $t1,label($t2) from effective memory halfword address

Load Halfword Unsigned : Set $t1 to zero-extended 16-bit value lhu$t1,label+100000 from effective memory halfword address

Load Halfword Unsigned : Set $t1 to zero-extended 16-bit value lhu$t1,label+100000($t2) from effective memory halfword address li$t1,-100 Load Immediate : Set $t1 to 16-bit immediate (sign-extended) Load Immediate : Set$t1 to unsigned 16-bit immediate (zero-

li $t1,100 extended) li$t1,100000 Load Immediate : Set $t1 to 32-bit immediate Load Linked : Paired with Store Conditional (sc) to perform ll$t1,($t2) atomic read-modify-write. Load Linked : Paired with Store Conditional (sc) to perform ll$t1,-100 atomic read-modify-write.

ll $t1,100 atomic read-modify-write. Load Linked : Paired with Store Conditional (sc) to perform ll$t1,100($t2) atomic read-modify-write. Load Linked : Paired with Store Conditional (sc) to perform ll$t1,100000 atomic read-modify-write.

ll $t1,100000($t2) atomic read-modify-write.

ll $t1,label atomic read-modify-write. Load Linked : Paired with Store Conditional (sc) to perform ll$t1,label($t2) atomic read-modify-write. Load Linked : Paired with Store Conditional (sc) to perform ll$t1,label+100000 atomic read-modify-write.

ll $t1,label+100000($t2) atomic read-modify-write.

Load Word : Set $t1 to contents of effective memory word lw$t1,($t2) address Load Word : Set$t1 to contents of effective memory word

lw $t1,-100 address Load Word : Set$t1 to contents of effective memory word

lw $t1,100 address Load Word : Set$t1 to contents of effective memory word

lw $t1,100($t2) address

Load Word : Set $t1 to contents of effective memory word lw$t1,100000 address

Load Word : Set $t1 to contents of effective memory word lw$t1,100000($t2) address Load Word : Set$t1 to contents of memory word at label's

lw $t1,label address Load Word : Set$t1 to contents of effective memory word

lw $t1,label($t2) address

Load Word : Set $t1 to contents of effective memory word lw$t1,label+100000 address

Load Word : Set $t1 to contents of effective memory word lw$t1,label+100000($t2) address Load Word Coprocessor 1 : Set$f1 to 32-bit value from effective

lwc1 $f1,($t2) memory word address

Load Word Coprocessor 1 : Set $f1 to 32-bit value from effective lwc1$f1,-100 memory word address

Load Word Coprocessor 1 : Set $f1 to 32-bit value from effective lwc1$f1,100000 memory word address

Load Word Coprocessor 1 : Set $f1 to 32-bit value from effective lwc1$f1,100000($t2) memory word address Load Word Coprocessor 1 : Set$f1 to 32-bit value from effective

lwc1 $f1,label memory word address Load Word Coprocessor 1 : Set$f1 to 32-bit value from effective

lwc1 $f1,label($t2) memory word address

Load Word Coprocessor 1 : Set $f1 to 32-bit value from effective lwc1$f1,label+100000 memory word address

Load Word Coprocessor 1 : Set $f1 to 32-bit value from effective lwc1$f1,label+100000($t2) memory word address Load Word Left : Load from 1 to 4 bytes left-justified into$t1,

starting with effective memory byte address and continuing

lwl $t1,($t2) through the low-order byte of its word

Load Word Left : Load from 1 to 4 bytes left-justified into $t1, starting with effective memory byte address and continuing lwl$t1,-100 through the low-order byte of its word

Load Word Left : Load from 1 to 4 bytes left-justified into $t1, starting with effective memory byte address and continuing lwl$t1,100 through the low-order byte of its word

Load Word Left : Load from 1 to 4 bytes left-justified into $t1, starting with effective memory byte address and continuing lwl$t1,100($t2) through the low-order byte of its word Load Word Left : Load from 1 to 4 bytes left-justified into$t1,

starting with effective memory byte address and continuing

lwl $t1,100000 through the low-order byte of its word Load Word Left : Load from 1 to 4 bytes left-justified into$t1,

starting with effective memory byte address and continuing

lwl $t1,100000($t2) through the low-order byte of its word

Load Word Left : Load from 1 to 4 bytes left-justified into $t1, starting with effective memory byte address and continuing lwl$t1,label through the low-order byte of its word

Load Word Left : Load from 1 to 4 bytes left-justified into $t1, starting with effective memory byte address and continuing lwl$t1,label($t2) through the low-order byte of its word Load Word Left : Load from 1 to 4 bytes left-justified into$t1,

starting with effective memory byte address and continuing

lwl $t1,label+100000 through the low-order byte of its word Load Word Left : Load from 1 to 4 bytes left-justified into$t1,

starting with effective memory byte address and continuing

lwl $t1,label+100000($t2) through the low-order byte of its word

Load Word Right : Load from 1 to 4 bytes right-justified into $t1, starting with effective memory byte address and continuing lwr$t1,($t2) through the high-order byte of its word Load Word Right : Load from 1 to 4 bytes right-justified into$t1,

starting with effective memory byte address and continuing

lwr $t1,-100 through the high-order byte of its word Load Word Right : Load from 1 to 4 bytes right-justified into$t1,

starting with effective memory byte address and continuing

lwr $t1,100 through the high-order byte of its word Load Word Right : Load from 1 to 4 bytes right-justified into$t1,

starting with effective memory byte address and continuing

lwr $t1,100($t2) through the high-order byte of its word

Load Word Right : Load from 1 to 4 bytes right-justified into $t1, starting with effective memory byte address and continuing lwr$t1,100000 through the high-order byte of its word

Load Word Right : Load from 1 to 4 bytes right-justified into $t1, starting with effective memory byte address and continuing lwr$t1,100000($t2) through the high-order byte of its word Load Word Right : Load from 1 to 4 bytes right-justified into$t1,

starting with effective memory byte address and continuing

lwr $t1,label through the high-order byte of its word Load Word Right : Load from 1 to 4 bytes right-justified into$t1,

starting with effective memory byte address and continuing

lwr $t1,label($t2) through the high-order byte of its word

Load Word Right : Load from 1 to 4 bytes right-justified into $t1, starting with effective memory byte address and continuing lwr$t1,label+100000 through the high-order byte of its word

Load Word Right : Load from 1 to 4 bytes right-justified into $t1, starting with effective memory byte address and continuing lwr$t1,label+100000($t2) through the high-order byte of its word Move From Coprocessor 1 Double : Set$t1 to contents of $f2, set next higher register from$t1 to contents of next higher

mfc1.d $t1,$f2 register from $f2 move$t1,$t2 MOVE : Set$t1 to contents of $t2 Move To Coprocessor 1 Double : Set$f2 to contents of $t1, set next higher register from$f2 to contents of next higher register

mtc1.d $t1,$f2 from $t1 MULtiplication : Set HI to high-order 32 bits, LO and$t1 to low-

order 32 bits of the product of $t2 and 16-bit signed immediate mul$t1,$t2,-100 (use mfhi to access HI, mflo to access LO) MULtiplication : Set HI to high-order 32 bits, LO and$t1 to low-

order 32 bits of the product of $t2 and 32-bit immediate (use mul$t1,$t2,100000 mfhi to access HI, mflo to access LO) MULtiplication with Overflow : Set$t1 to low-order 32 bits of

mulo $t1,$t2,$t3 the product of$t2 and $t3 MULtiplication with Overflow : Set$t1 to low-order 32 bits of

mulo $t1,$t2,-100 the product of $t2 and signed 16-bit immediate MULtiplication with Overflow : Set$t1 to low-order 32 bits of

mulo $t1,$t2,100000 the product of $t2 and 32-bit immediate MULtiplication with Overflow Unsigned : Set$t1 to low-order

mulou $t1,$t2,$t3 32 bits of the product of$t2 and $t3 MULtiplication with Overflow Unsigned : Set$t1 to low-order

mulou $t1,$t2,-100 32 bits of the product of $t2 and signed 16-bit immediate MULtiplication with Overflow Unsigned : Set$t1 to low-order

mulou $t1,$t2,100000 32 bits of the product of $t2 and 32-bit immediate MULtiplication Unsigned : Set HI to high-order 32 bits, LO and$t1 to low-order 32 bits of ($t2 multiplied by$t3, unsigned

mulu $t1,$t2,$t3 multiplication) MULtiplication Unsigned : Set HI to high-order 32 bits, LO and$t1 to low-order 32 bits of ($t2 multiplied by 16-bit immediate, mulu$t1,$t2,-100 unsigned multiplication) MULtiplication Unsigned : Set HI to high-order 32 bits, LO and$t1 to low-order 32 bits of ($t2 multiplied by 32-bit immediate, mulu$t1,$t2,100000 unsigned multiplication) neg$t1,$t2 NEGate : Set$t1 to negation of $t2 negu$t1,$t2 NEGate Unsigned : Set$t1 to negation of $t2, no overflow not$t1,$t2 Bitwise NOT (bit inversion) or$t1,$t2,100 OR : set$t1 to ($t2 bitwise-OR 16-bit unsigned immediate) or$t1,100 OR : set $t1 to ($t1 bitwise-OR 16-bit unsigned immediate)

ori $t1,$t2,100000 OR Immediate : set $t1 to ($t2 bitwise-OR 32-bit immediate)

OR Immediate : set $t1 to ($t1 bitwise-OR 16-bit unsigned

ori $t1,100 immediate) ori$t1,100000 OR Immediate : set $t1 to ($t1 bitwise-OR 32-bit immediate)

rem $t1,$t2,$t3 REMainder : Set$t1 to (remainder of $t2 divided by$t3)

REMainder : Set $t1 to (remainder of$t2 divided by 16-bit

rem $t1,$t2,-100 immediate)

REMainder : Set $t1 to (remainder of$t2 divided by 32-bit

rem $t1,$t2,100000 immediate)

REMainder : Set $t1 to (remainder of$t2 divided by $t3, remu$t1,$t2,$t3 unsigned division)

REMainder : Set $t1 to (remainder of$t2 divided by 16-bit

remu $t1,$t2,-100 immediate, unsigned division)

REMainder : Set $t1 to (remainder of$t2 divided by 32-bit

remu $t1,$t2,100000 immediate, unsigned division)

ROtate Left : Set $t1 to ($t2 rotated left by number of bit

rol $t1,$t2,$t3 positions specified in$t3)

ROtate Left : Set $t1 to ($t2 rotated left by number of bit

rol $t1,$t2,10 positions specified in 5-bit immediate)

ROtate Right : Set $t1 to ($t2 rotated right by number of bit

ror $t1,$t2,$t3 positions specified in$t3)

ROtate Right : Set $t1 to ($t2 rotated right by number of bit

ror $t1,$t2,10 positions specified in 5-bit immediate)

Store floating point Double precision : Store 64 bits from $f2 and s.d$f2,($t2)$f3 register pair to effective memory doubleword address

Store floating point Double precision : Store 64 bits from $f2 and s.d$f2,-100 $f3 register pair to effective memory doubleword address Store floating point Double precision : Store 64 bits from$f2 and

s.d $f2,100000$f3 register pair to effective memory doubleword address

Store floating point Double precision : Store 64 bits from $f2 and s.d$f2,100000($t2)$f3 register pair to effective memory doubleword address

Store floating point Double precision : Store 64 bits from $f2 and s.d$f2,label $f3 register pair to effective memory doubleword address Store floating point Double precision : Store 64 bits from$f2 and

s.d $f2,label($t2) $f3 register pair to effective memory doubleword address Store floating point Double precision : Store 64 bits from$f2 and

s.d $f2,label+100000$f3 register pair to effective memory doubleword address

Store floating point Double precision : Store 64 bits from $f2 and s.d$f2,label+100000($t2)$f3 register pair to effective memory doubleword address

Store floating point Single precision : Store 32-bit value from $f1 s.s$f1,($t2) to effective memory word address Store floating point Single precision : Store 32-bit value from$f1

s.s $f1,-100 to effective memory word address Store floating point Single precision : Store 32-bit value from$f1

s.s $f1,100000 to effective memory word address Store floating point Single precision : Store 32-bit value from$f1

s.s $f1,100000($t2) to effective memory word address

Store floating point Single precision : Store 32-bit value from $f1 s.s$f1,label to effective memory word address

Store floating point Single precision : Store 32-bit value from $f1 s.s$f1,label($t2) to effective memory word address Store floating point Single precision : Store 32-bit value from$f1

s.s $f1,label+100000 to effective memory word address Store floating point Single precision : Store 32-bit value from$f1

s.s $f1,label+100000($t2) to effective memory word address

Store Byte : Store the low-order 8 bits of $t1 into the effective sb$t1,($t2) memory byte address Store Byte : Store the low-order 8 bits of$t1 into the effective

sb $t1,-100 memory byte address Store Byte : Store the low-order 8 bits of$t1 into the effective

sb $t1,100 memory byte address Store Byte : Store the low-order 8 bits of$t1 into the effective

sb $t1,100($t2) memory byte address

Store Byte : Store the low-order 8 bits of $t1 into the effective sb$t1,100000 memory byte address

Store Byte : Store the low-order 8 bits of $t1 into the effective sb$t1,100000($t2) memory byte address Store Byte : Store the low-order 8 bits of$t1 into the effective

sb $t1,label memory byte address Store Byte : Store the low-order 8 bits of$t1 into the effective

sb $t1,label($t2) memory byte address

Store Byte : Store the low-order 8 bits of $t1 into the effective sb$t1,label+100000 memory byte address

Store Byte : Store the low-order 8 bits of $t1 into the effective sb$t1,label+100000($t2) memory byte address Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,($t2) read-modify-write. Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,-100 read-modify-write.

sc $t1,100 read-modify-write. Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,100($t2) read-modify-write. Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,100000 read-modify-write.

sc $t1,100000($t2) read-modify-write.

sc $t1,label read-modify-write. Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,label($t2) read-modify-write. Store Conditional : Paired with Load Linked (ll) to perform atomic sc$t1,label+100000 read-modify-write.

sc $t1,label+100000($t2) read-modify-write.

Store Doubleword : Store contents of $t1 and the next register sd$t1,($t2) to the 64 bits starting at effective memory word address Store Doubleword : Store contents of$t1 and the next register

sd $t1,-100($t2) to the 64 bits starting at effective memory byte address

Store Doubleword : Store contents of $t1 and the next register sd$t1,100000 to the 64 bits starting at effective memory word address

Store Doubleword : Store contents of $t1 and the next register sd$t1,100000($t2) to the 64 bits starting at effective memory word address Store Doubleword : Store contents of$t1 and the next register

sd $t1,label to the 64 bits starting at effective memory word address Store Doubleword : Store contents of$t1 and the next register

sd $t1,label($t2) to the 64 bits starting at effective memory word address

Store Doubleword : Store contents of $t1 and the next register sd$t1,label+100000 to the 64 bits starting at effective memory word address

Store Doubleword : Store contents of $t1 and the next register sd$t1,label+100000($t2) to the 64 bits starting at effective memory word address Store Doubleword Coprocessor 1 : Store 64 bits from$f2 and

sdc1 $f2,($t2) $f3 register pair to effective memory doubleword address Store Doubleword Coprocessor 1 : Store 64 bits from$f2 and

sdc1 $f2,-100$f3 register pair to effective memory doubleword address

Store Doubleword Coprocessor 1 : Store 64 bits from $f2 and sdc1$f2,100000 $f3 register pair to effective memory doubleword address Store Doubleword Coprocessor 1 : Store 64 bits from$f2 and

sdc1 $f2,100000($t2) $f3 register pair to effective memory doubleword address Store Doubleword Coprocessor 1 : Store 64 bits from$f2 and

sdc1 $f2,label$f3 register pair to effective memory doubleword address

Store Doubleword Coprocessor 1 : Store 64 bits from $f2 and sdc1$f2,label($t2)$f3 register pair to effective memory doubleword address

Store Doubleword Coprocessor 1 : Store 64 bits from $f2 and sdc1$f2,label+100000 $f3 register pair to effective memory doubleword address Store Doubleword Coprocessor 1 : Store 64 bits from$f2 and

sdc1 $f2,label+100000($t2) $f3 register pair to effective memory doubleword address seq$t1,$t2,$t3 Set EQual : if $t2 equal to$t3 then set $t1 to 1 else 0 Set EQual : if$t2 equal to 16-bit immediate then set $t1 to 1 else seq$t1,$t2,-100 0 Set EQual : if$t2 equal to 32-bit immediate then set $t1 to 1 else seq$t1,$t2,100000 0 Set Greater or Equal : if$t2 greater or equal to $t3 then set$t1

sge $t1,$t2,$t3 to 1 else 0 Set Greater or Equal : if$t2 greater or equal to 16-bit immediate

sge $t1,$t2,-100 then set $t1 to 1 else 0 Set Greater or Equal : if$t2 greater or equal to 32-bit immediate

sge $t1,$t2,100000 then set $t1 to 1 else 0 Set Greater or Equal Unsigned : if$t2 greater or equal to $t3 sgeu$t1,$t2,$t3 (unsigned compare) then set $t1 to 1 else 0 Set Greater or Equal Unsigned : if$t2 greater or equal to 16-bit

sgeu $t1,$t2,-100 immediate (unsigned compare) then set $t1 to 1 else 0 Set Greater or Equal Unsigned : if$t2 greater or equal to 32-bit

sgeu $t1,$t2,100000 immediate (unsigned compare) then set $t1 to 1 else 0 sgt$t1,$t2,$t3 Set Greater Than : if $t2 greater than$t3 then set $t1 to 1 else 0 Set Greater Than : if$t2 greater than 16-bit immediate then set

sgt $t1,$t2,-100 $t1 to 1 else 0 Set Greater Than : if$t2 greater than 32-bit immediate then set

sgt $t1,$t2,100000 $t1 to 1 else 0 Set Greater Than Unsigned : if$t2 greater than $t3 (unsigned sgtu$t1,$t2,$t3 compare) then set $t1 to 1 else 0 Set Greater Than Unsigned : if$t2 greater than 16-bit immediate

sgtu $t1,$t2,-100 (unsigned compare) then set $t1 to 1 else 0 Set Greater Than Unsigned : if$t2 greater than 32-bit immediate

sgtu $t1,$t2,100000 (unsigned compare) then set $t1 to 1 else 0 Store Halfword : Store the low-order 16 bits of$t1 into the

sh $t1,($t2) effective memory halfword address

Store Halfword : Store the low-order 16 bits of $t1 into the sh$t1,-100 effective memory halfword address

Store Halfword : Store the low-order 16 bits of $t1 into the sh$t1,100 effective memory halfword address

Store Halfword : Store the low-order 16 bits of $t1 into the sh$t1,100($t2) effective memory halfword address Store Halfword : Store the low-order 16 bits of$t1 into the

sh $t1,100000 effective memory halfword address Store Halfword : Store the low-order 16 bits of$t1 into the

sh $t1,100000($t2) effective memory halfword address

Store Halfword : Store the low-order 16 bits of $t1 into the sh$t1,label effective memory halfword address

Store Halfword : Store the low-order 16 bits of $t1 into the sh$t1,label($t2) effective memory halfword address Store Halfword : Store the low-order 16 bits of$t1 into the

sh $t1,label+100000 effective memory halfword address Store Halfword : Store the low-order 16 bits of$t1 into the

sh $t1,label+100000($t2) effective memory halfword address

Set Less or Equal : if $t2 less or equal to$t3 then set $t1 to 1 else sle$t1,$t2,$t3 0

Set Less or Equal : if $t2 less or equal to 16-bit immediate then sle$t1,$t2,-100 set$t1 to 1 else 0

Set Less or Equal : if $t2 less or equal to 32-bit immediate then sle$t1,$t2,100000 set$t1 to 1 else 0

Set Less or Equal Unsigned: if $t2 less or equal to$t3 (unsigned

sleu $t1,$t2,$t3 compare) then set$t1 to 1 else 0

Set Less or Equal Unsigned: if $t2 less or equal to 16-bit sleu$t1,$t2,-100 immediate (unsigned compare) then set$t1 to 1 else 0

Set Less or Equal Unsigned: if $t2 less or equal to 32-bit sleu$t1,$t2,100000 immediate (unsigned compare) then set$t1 to 1 else 0

sne $t1,$t2,$t3 Set Not Equal : if$t2 not equal to $t3 then set$t1 to 1 else 0

Set Not Equal : if $t2 not equal to 16-bit immediate then set$t1

sne $t1,$t2,-100 to 1 else 0

Set Not Equal : if $t2 not equal to 32-bit immediate then set$t1

sne $t1,$t2,100000 to 1 else 0

sub $t1,$t2,-100 SUBtraction : set $t1 to ($t2 minus 16-bit immediate)

sub $t1,$t2,100000 SUBtraction : set $t1 to ($t2 minus 32-bit immediate)

subi $t1,$t2,-100 SUBtraction Immediate : set $t1 to ($t2 minus 16-bit immediate)

subi $t1,$t2,100000 SUBtraction Immediate : set $t1 to ($t2 minus 32-bit immediate)

SUBtraction Immediate Unsigned : set $t1 to ($t2 minus 32-bit

subiu $t1,$t2,100000 immediate), no overflow

SUBtraction Unsigned : set $t1 to ($t2 minus 32-bit immediate),

subu $t1,$t2,100000 no overflow

Store Word : Store $t1 contents into effective memory word sw$t1,($t2) address Store Word : Store$t1 contents into effective memory word

sw $t1,-100 address Store Word : Store$t1 contents into effective memory word

sw $t1,100 address Store Word : Store$t1 contents into effective memory word

sw $t1,100($t2) address

Store Word : Store $t1 contents into effective memory word sw$t1,100000 address

Store Word : Store $t1 contents into effective memory word sw$t1,100000($t2) address Store Word : Store$t1 contents into memory word at label's

sw $t1,label address Store Word : Store$t1 contents into effective memory word

sw $t1,label($t2) address

Store Word : Store $t1 contents into effective memory word sw$t1,label+100000 address

Store Word : Store $t1 contents into effective memory word sw$t1,label+100000($t2) address Store Word Coprocessor 1 : Store 32-bit value from$f1 to

swc1 $f1,($t2) effective memory word address

Store Word Coprocessor 1 : Store 32-bit value from $f1 to swc1$f1,-100 effective memory word address

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DETTAGLI
Corso di laurea: Corso di laurea in ingegneria informatica (MANTOVA - PAVIA)
SSD:
Università: Pavia - Unipv
A.A.: 2017-2018

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher UNSIGNED di informazioni apprese con la frequenza delle lezioni di Calcolatori elettronici e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università Pavia - Unipv o del prof Danese Giovanni.

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