Estratto del documento

MIPS Directives Align next data item on specified byte boundary (0=byte, 1=half, 2=word,

.align 3=double)

.ascii Store the string in the Data segment but do not add null terminator

.asciiz Store the string in the Data segment and add null terminator

.byte Store the listed value(s) as 8 bit bytes

.data Subsequent items stored in Data segment at next available address

.double Store the listed value(s) as double precision floating point

.end_macro End macro definition. See .macro

Substitute second operand for first. First operand is symbol, second

.eqv operand is expression (like #define)

.extern Declare the listed label and byte length to be a global data field

.float Store the listed value(s) as single precision floating point

.globl Declare the listed label(s) as global to enable referencing from other files

.half Store the listed value(s) as 16 bit halfwords on halfword boundary

.include Insert the contents of the specified file. Put filename in quotes.

.kdata Subsequent items stored in Kernel Data segment at next available address

Subsequent items (instructions) stored in Kernel Text segment at next

.ktext available address

.macro Begin macro definition. See .end_macro

Set assembler variables. Currently ignored but included for SPIM

.set compatability

.space Reserve the next specified number of bytes in Data segment

Subsequent items (instructions) stored in Text segment at next available

.text address

.word Store the listed value(s) as 32 bit words on word boundary

MIPS Instruction Set Floating point absolute value double precision : Set $f2 to

abs.d $f2,$f4 absolute value of $f4, double precision

Floating point absolute value single precision : Set $f0 to

abs.s $f0,$f1 absolute value of $f1, single precision

add $t1,$t2,$t3 Addition with overflow : set $t1 to ($t2 plus $t3)

Floating point addition double precision : Set $f2 to double-

add.d $f2,$f4,$f6 precision floating point value of $f4 plus $f6

Floating point addition single precision : Set $f0 to single-

add.s $f0,$f1,$f3 precision floating point value of $f1 plus $f3

Addition immediate with overflow : set $t1 to ($t2 plus signed

addi $t1,$t2,-100 16-bit immediate)

Addition immediate unsigned without overflow : set $t1 to ($t2

addiu $t1,$t2,-100 plus signed 16-bit immediate), no overflow

Addition unsigned without overflow : set $t1 to ($t2 plus $t3), no

addu $t1,$t2,$t3 overflow

and $t1,$t2,$t3 Bitwise AND : Set $t1 to bitwise AND of $t2 and $t3

Bitwise AND immediate : Set $t1 to bitwise AND of $t2 and

andi $t1,$t2,100 zero-extended 16-bit immediate

Branch if specified FP condition flag false (BC1F, not BCLF) : If

Coprocessor 1 condition flag specified by immediate is false

bc1f 1,label (zero) then branch to statement at label's address

Branch if FP condition flag 0 false (BC1F, not BCLF) : If

Coprocessor 1 condition flag 0 is false (zero) then branch to

bc1f label statement at label's address

Branch if specified FP condition flag true (BC1T, not BCLT) : If

Coprocessor 1 condition flag specified by immediate is true (one)

bc1t 1,label then branch to statement at label's address

Branch if FP condition flag 0 true (BC1T, not BCLT) : If

Coprocessor 1 condition flag 0 is true (one) then branch to

bc1t label statement at label's address

Branch if equal : Branch to statement at label's address if $t1 and

beq $t1,$t2,label $t2 are equal

Branch if greater than or equal to zero : Branch to statement at

bgez $t1,label label's address if $t1 is greater than or equal to zero

Branch if greater then or equal to zero and link : If $t1 is greater

than or equal to zero, then set $ra to the Program Counter and

bgezal $t1,label branch to statement at label's address

Branch if greater than zero : Branch to statement at label's

bgtz $t1,label address if $t1 is greater than zero

Branch if less than or equal to zero : Branch to statement at

blez $t1,label label's address if $t1 is less than or equal to zero

Branch if less than zero : Branch to statement at label's address if

bltz $t1,label $t1 is less than zero

Branch if less than zero and link : If $t1 is less than or equal to

zero, then set $ra to the Program Counter and branch to

bltzal $t1,label statement at label's address

Branch if not equal : Branch to statement at label's address if $t1

bne $t1,$t2,label and $t2 are not equal

break Break execution : Terminate program execution with exception

Break execution with code : Terminate program execution with

break 100 specified exception code

Compare equal double precision : If $f2 is equal to $f4 (double-

c.eq.d $f2,$f4 precision), set Coprocessor 1 condition flag 0 true else set it false

Compare equal double precision : If $f2 is equal to $f4 (double-

precision), set Coprocessor 1 condition flag specified by

c.eq.d 1,$f2,$f4 immediate to true else set it to false

Compare equal single precision : If $f0 is equal to $f1, set

c.eq.s $f0,$f1 Coprocessor 1 condition flag 0 true else set it false

Compare equal single precision : If $f0 is equal to $f1, set

Coprocessor 1 condition flag specied by immediate to true else

c.eq.s 1,$f0,$f1 set it to false

Compare less or equal double precision : If $f2 is less than or

equal to $f4 (double-precision), set Coprocessor 1 condition flag

c.le.d $f2,$f4 0 true else set it false

Compare less or equal double precision : If $f2 is less than or

equal to $f4 (double-precision), set Coprocessor 1 condition flag

c.le.d 1,$f2,$f4 specfied by immediate true else set it false

Compare less or equal single precision : If $f0 is less than or

equal to $f1, set Coprocessor 1 condition flag 0 true else set it

c.le.s $f0,$f1 false

Compare less or equal single precision : If $f0 is less than or

equal to $f1, set Coprocessor 1 condition flag specified by

c.le.s 1,$f0,$f1 immediate to true else set it to false

Compare less than double precision : If $f2 is less than $f4

(double-precision), set Coprocessor 1 condition flag 0 true else

c.lt.d $f2,$f4 set it false

Compare less than double precision : If $f2 is less than $f4

(double-precision), set Coprocessor 1 condition flag specified by

c.lt.d 1,$f2,$f4 immediate to true else set it to false

Compare less than single precision : If $f0 is less than $f1, set

c.lt.s $f0,$f1 Coprocessor 1 condition flag 0 true else set it false

Compare less than single precision : If $f0 is less than $f1, set

Coprocessor 1 condition flag specified by immediate to true else

c.lt.s 1,$f0,$f1 set it to false

Ceiling double precision to word : Set $f1 to 32-bit integer ceiling

ceil.w.d $f1,$f2 of double-precision float in $f2

Ceiling single precision to word : Set $f0 to 32-bit integer ceiling

ceil.w.s $f0,$f1 of single-precision float in $f1

Count number of leading ones : Set $t1 to the count of leading

clo $t1,$t2 one bits in $t2 starting at most significant bit position

Count number of leading zeroes : Set $t1 to the count of leading

clz $t1,$t2 zero bits in $t2 starting at most significant bit positio

Convert from single precision to double precision : Set $f2 to

cvt.d.s $f2,$f1 double precision equivalent of single precision value in $f1

Convert from word to double precision : Set $f2 to double

cvt.d.w $f2,$f1 precision equivalent of 32-bit integer value in $f1

Convert from double precision to single precision : Set $f1 to

cvt.s.d $f1,$f2 single precision equivalent of double precision value in $f2

Convert from word to single precision : Set $f0 to single

cvt.s.w $f0,$f1 precision equivalent of 32-bit integer value in $f2

Convert from double precision to word : Set $f1 to 32-bit integer

cvt.w.d $f1,$f2 equivalent of double precision value in $f2

Convert from single precision to word : Set $f0 to 32-bit integer

cvt.w.s $f0,$f1 equivalent of single precision value in $f1

Division with overflow : Divide $t1 by $t2 then set LO to

quotient and HI to remainder (use mfhi to access HI, mflo to

div $t1,$t2 access LO)

Floating point division double precision : Set $f2 to double-

div.d $f2,$f4,$f6 precision floating point value of $f4 divided by $f6

Floating point division single precision : Set $f0 to single-

div.s $f0,$f1,$f3 precision floating point value of $f1 divided by $f3

Division unsigned without overflow : Divide unsigned $t1 by $t2

then set LO to quotient and HI to remainder (use mfhi to access

divu $t1,$t2 HI, mflo to access LO)

Exception return : Set Program Counter to Coprocessor 0 EPC

register value, set Coprocessor Status register bit 1 (exception

eret level) to zero

Floor double precision to word : Set $f1 to 32-bit integer floor of

floor.w.d $f1,$f2 double-precision float in $f2

Floor single precision to word : Set $f0 to 32-bit integer floor of

floor.w.s $f0,$f1 single-precision float in $f1

j target Jump unconditionally : Jump to statement at target address

Jump and link : Set $ra to Program Counter (return address) then

jal target jump to statement at target address

Jump and link register : Set $ra to Program Counter (return

jalr $t1 address) then jump to statement whose address is in $t1

Jump and link register : Set $t1 to Program Counter (return

jalr $t1,$t2 address) then jump to statement whose address is in $t2

Jump register unconditionally : Jump to statement whose

jr $t1 address is in $t1

Load byte : Set $t1 to sign-extended 8-bit value from effective

lb $t1,-100($t2) memory byte address

Load byte unsigned : Set $t1 to zero-extended 8-bit value from

lbu $t1,-100($t2) effective memory byte address

Load double word Coprocessor 1 (FPU)) : Set $f2 to 64-bit value

ldc1 $f2,-100($t2) from effective memory doubleword address

Load halfword : Set $t1 to sign-extended 16-bit value from

lh $t1,-100($t2) effective memory halfword address

Load halfword unsigned : Set $t1 to zero-extended 16-bit value

lhu $t1,-100($t2) from effective memory halfword address

Load linked : Paired with Store Conditional (sc) to perform atomic

ll $t1,-100($t2) read-modify-write.

Load upper immediate : Set high-order 16 bits of $t1 to 16-bit

lui $t1,100 immediate and low-order 16 bits to 0

Load word : Set $t1 to contents of effective memory word

lw $t1,-100($t2) address

Load word into Coprocessor 1 (FPU) : Set $f1 to 32-bit value

lwc1 $f1,-100($t2) from effective memory word address

Load word left : Load from 1 to 4 bytes left-justified into $t1,

starting with effective memory byte address and continuing

lwl $t1,-100($t2) through the low-order byte of its word

Load word right : Load from 1 to 4 bytes right-justified into $t1,

starting with effective memory byte address and continuing

lwr $t1,-100($t2) through the high-order byte of its word

Multiply add : Multiply $t1 by $t2 then increment HI by high-

order 32 bits of product, increment LO by low-order 32 bits of

madd $t1,$t2 product (use mfhi to access HI, mflo to access LO)

Multiply add unsigned : Multiply $t1 by $t2 then increment HI by

high-order 32 bits of product, increment LO by low-order 32 bits

maddu $t1,$t2 of product, unsigned (use mfhi to access HI, mflo to access LO)

Move from Coprocessor 0 : Set $t1 to the value stored in

mfc0 $t1,$8 Coprocessor 0 register $8

Move from Coprocessor 1 (FPU) : Set $t1 to value in

mfc1 $t1,$f1 Coprocessor 1 register $f1

Move from HI register : Set $t1 to contents of HI (see multiply

mfhi $t1 and divide operations)

Move from LO register : Set $t1 to contents of LO (see multiply

mflo $t1 and divide operations)

Move floating point double precision : Set double precision $f2 to

mov.d $f2,$f4 double precision value in $f4

Move floating point single precision : Set single precision $f0 to

mov.s $f0,$f1 single precision value in $f1

Move if FP condition flag 0 false : Set $t1 to $t2 if FPU

movf $t1,$t2 (Coprocessor 1) condition flag 0 is false (zero)

Move if specified FP condition flag false : Set $t1 to $t2 if FPU

(Coprocessor 1) condition flag specified by the immediate is false

movf $t1,$t2,1 (zero)

Move floating point double precision : If condition flag 0 false, set

movf.d $f2,$f4 double precision $f2 to double precision value in $f4

Move floating point double precision : If condition flag specified

by immediate is false, set double precision $f2 to double

movf.d $f2,$f4,1 precision value in $f4

Move floating point single precision : If condition flag 0 is false,

movf.s $f0,$f1 set single precision $f0 to single precision value in $f1

Move floating point single precision : If condition flag specified by

immediate is false, set single precision $f0 to single precision

movf.s $f0,$f1,1 value in $f1e

movn $t1,$t2,$t3 Move conditional not zero : Set $t1 to $t2 if $t3 is not zero

Move floating point double precision : If $t3 is not zero, set

movn.d $f2,$f4,$t3 double precision $f2 to double precision value in $f4

Move floating point single precision : If $t3 is not zero, set single

movn.s $f0,$f1,$t3 precision $f0 to single precision value in $f1

Move if FP condition flag 0 true : Set $t1 to $t2 if FPU

movt $t1,$t2 (Coprocessor 1) condition flag 0 is true (one)

Move if specfied FP condition flag true : Set $t1 to $t2 if FPU

(Coprocessor 1) condition flag specified by the immediate is true

movt $t1,$t2,1 (one)

Move floating point double precision : If condition flag 0 true, set

movt.d $f2,$f4 double precision $f2 to double precision value in $f4

Move floating point double precision : If condition flag specified

by immediate is true, set double precision $f2 to double precision

movt.d $f2,$f4,1 value in $f4e

Move floating point single precision : If condition flag 0 is true,

movt.s $f0,$f1 set single precision $f0 to single precision value in $f1e

Move floating point single precision : If condition flag specified by

immediate is true, set single precision $f0 to single precision

movt.s $f0,$f1,1 value in $f1e

movz $t1,$t2,$t3 Move conditional zero : Set $t1 to $t2 if $t3 is zero

Move floating point double precision : If $t3 is zero, set double

movz.d $f2,$f4,$t3 precision $f2 to double precision value in $f4

Move floating point single precision : If $t3 is zero, set single

movz.s $f0,$f1,$t3 precision $f0 to single precision value in $f1

Multiply subtract : Multiply $t1 by $t2 then decrement HI by

high-order 32 bits of product, decrement LO by low-order 32

msub $t1,$t2 bits of product (use mfhi to access HI, mflo to access LO)

Multiply subtract unsigned : Multiply $t1 by $t2 then decrement

HI by high-order 32 bits of product, decement LO by low-order

32 bits of product, unsigned (use mfhi to access HI, mflo to

msubu $t1,$t2 access LO)

Move to Coprocessor 0 : Set Coprocessor 0 register $8 to value

mtc0 $t1,$8 stored in $t1

Move to Coprocessor 1 (FPU) : Set Coprocessor 1 register $f1 to

mtc1 $t1,$f1 value in $t1

Move to HI registerr : Set HI to contents of $t1 (see multiply and

mthi $t1 divide operations)

Move to LO register : Set LO to contents of $t1 (see multiply and

mtlo $t1 divide operations)

Multiplication without overflow : Set HI to high-order 32 bits, LO

and $t1 to low-order 32 bits of the product of $t2 and $t3 (use

mul $t1,$t2,$t3 mfhi to access HI, mflo to access LO)

Floating point multiplication double precision : Set $f2 to double-

mul.d $f2,$f4,$f6 precision floating point value of $f4 times $f6

Floating point multiplication single precision : Set $f0 to single-

mul.s $f0,$f1,$f3 precision floating point value of $f1 times $f3

Multiplication : Set hi to high-order 32 bits, lo to low-order 32

bits of the product of $t1 and $t2 (use mfhi to access hi, mflo to

mult $t1,$t2 access lo)

Multiplication unsigned : Set HI to high-order 32 bits, LO to low-

order 32 bits of the product of unsigned $t1 and $t2 (use mfhi to

multu $t1,$t2 access HI, mflo to access LO)

Floating point negate double precision : Set double precision $f2

neg.d $f2,$f4 to negation of double precision value in $f4

Floating point negate single precision : Set single precision $f0 to

neg.s $f0,$f1 negation of single precision value in $f1

nop Null operation : machine code is all zeroes

nor $t1,$t2,$t3 Bitwise NOR : Set $t1 to bitwise NOR of $t2 and $t3

or $t1,$t2,$t3 Bitwise OR : Set $t1 to bitwise OR of $t2 and $t3

Bitwise OR immediate : Set $t1 to bitwise OR of $t2 and zero-

ori $t1,$t2,100 extended 16-bit immediate

Round double precision to word : Set $f1 to 32-bit integer round

round.w.d $f1,$f2 of double-precision float in $f2

Round single precision to word : Set $f0 to 32-bit integer round

round.w.s $f0,$f1 of single-precision float in $f1

Store byte : Store the low-order 8 bits of $t1 into the effective

sb $t1,-100($t2) memory byte address

Store conditional : Paired with Load Linked (ll) to perform atomic

read-modify-write. Stores $t1 value into effective address, then

sc $t1,-100($t2) sets $t1 to 1 for success.

Store double word from Coprocessor 1 (FPU)) : Store 64 bit

sdc1 $f2,-100($t2) value in $f2 to effective memory doubleword address

Store halfword : Store the low-order 16 bits of $t1 into

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Ingegneria industriale e dell'informazione ING-INF/01 Elettronica

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher UNSIGNED di informazioni apprese con la frequenza delle lezioni di Calcolatori elettronici e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università Università degli Studi di Pavia o del prof Danese Giovanni.
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