Anteprima
Vedrai una selezione di 7 pagine su 27
MIPS Instruction Set Pag. 1 MIPS Instruction Set Pag. 2
Anteprima di 7 pagg. su 27.
Scarica il documento per vederlo tutto.
MIPS Instruction Set Pag. 6
Anteprima di 7 pagg. su 27.
Scarica il documento per vederlo tutto.
MIPS Instruction Set Pag. 11
Anteprima di 7 pagg. su 27.
Scarica il documento per vederlo tutto.
MIPS Instruction Set Pag. 16
Anteprima di 7 pagg. su 27.
Scarica il documento per vederlo tutto.
MIPS Instruction Set Pag. 21
Anteprima di 7 pagg. su 27.
Scarica il documento per vederlo tutto.
MIPS Instruction Set Pag. 26
1 su 27
D/illustrazione/soddisfatti o rimborsati
Disdici quando
vuoi
Acquista con carta
o PayPal
Scarica i documenti
tutte le volte che vuoi
Estratto del documento

Multiply subtract unsigned : Multiply $t1 by $t2 then decrement

HI by high-order 32 bits of product, decement LO by low-order

32 bits of product, unsigned (use mfhi to access HI, mflo to

msubu $t1,$t2 access LO)

Move to Coprocessor 0 : Set Coprocessor 0 register $8 to value

mtc0 $t1,$8 stored in $t1

Move to Coprocessor 1 (FPU) : Set Coprocessor 1 register $f1 to

mtc1 $t1,$f1 value in $t1

Move to HI registerr : Set HI to contents of $t1 (see multiply and

mthi $t1 divide operations)

Move to LO register : Set LO to contents of $t1 (see multiply and

mtlo $t1 divide operations)

Multiplication without overflow : Set HI to high-order 32 bits, LO

and $t1 to low-order 32 bits of the product of $t2 and $t3 (use

mul $t1,$t2,$t3 mfhi to access HI, mflo to access LO)

Floating point multiplication double precision : Set $f2 to double-

mul.d $f2,$f4,$f6 precision floating point value of $f4 times $f6

Floating point multiplication single precision : Set $f0 to single-

mul.s $f0,$f1,$f3 precision floating point value of $f1 times $f3

Multiplication : Set hi to high-order 32 bits, lo to low-order 32

bits of the product of $t1 and $t2 (use mfhi to access hi, mflo to

mult $t1,$t2 access lo)

Multiplication unsigned : Set HI to high-order 32 bits, LO to low-

order 32 bits of the product of unsigned $t1 and $t2 (use mfhi to

multu $t1,$t2 access HI, mflo to access LO)

Floating point negate double precision : Set double precision $f2

neg.d $f2,$f4 to negation of double precision value in $f4

Floating point negate single precision : Set single precision $f0 to

neg.s $f0,$f1 negation of single precision value in $f1

nop Null operation : machine code is all zeroes

nor $t1,$t2,$t3 Bitwise NOR : Set $t1 to bitwise NOR of $t2 and $t3

or $t1,$t2,$t3 Bitwise OR : Set $t1 to bitwise OR of $t2 and $t3

Bitwise OR immediate : Set $t1 to bitwise OR of $t2 and zero-

ori $t1,$t2,100 extended 16-bit immediate

Round double precision to word : Set $f1 to 32-bit integer round

round.w.d $f1,$f2 of double-precision float in $f2

Round single precision to word : Set $f0 to 32-bit integer round

round.w.s $f0,$f1 of single-precision float in $f1

Store byte : Store the low-order 8 bits of $t1 into the effective

sb $t1,-100($t2) memory byte address

Store conditional : Paired with Load Linked (ll) to perform atomic

read-modify-write. Stores $t1 value into effective address, then

sc $t1,-100($t2) sets $t1 to 1 for success.

Store double word from Coprocessor 1 (FPU)) : Store 64 bit

sdc1 $f2,-100($t2) value in $f2 to effective memory doubleword address

Store halfword : Store the low-order 16 bits of $t1 into the

sh $t1,-100($t2) effective memory halfword address

Shift left logical : Set $t1 to result of shifting $t2 left by number

sll $t1,$t2,10 of bits specified by immediate

Shift left logical variable : Set $t1 to result of shifting $t2 left by

sllv $t1,$t2,$t3 number of bits specified by value in low-order 5 bits of $t3

Set less than : If $t2 is less than $t3, then set $t1 to 1 else set $t1

slt $t1,$t2,$t3 to 0

Set less than immediate : If $t2 is less than sign-extended 16-bit

slti $t1,$t2,-100 immediate, then set $t1 to 1 else set $t1 to 0

Set less than immediate unsigned : If $t2 is less than sign-

extended 16-bit immediate using unsigned comparison, then set

sltiu $t1,$t2,-100 $t1 to 1 else set $t1 to 0

Set less than unsigned : If $t2 is less than $t3 using unsigned

sltu $t1,$t2,$t3 comparision, then set $t1 to 1 else set $t1 to 0

Square root double precision : Set $f2 to double-precision

sqrt.d $f2,$f4 floating point square root of $f4

Square root single precision : Set $f0 to single-precision floating

sqrt.s $f0,$f1 point square root of $f1

Shift right arithmetic : Set $t1 to result of sign-extended shifting

sra $t1,$t2,10 $t2 right by number of bits specified by immediate

Shift right arithmetic variable : Set $t1 to result of sign-extended

shifting $t2 right by number of bits specified by value in low-

srav $t1,$t2,$t3 order 5 bits of $t3

Shift right logical : Set $t1 to result of shifting $t2 right by

srl $t1,$t2,10 number of bits specified by immediate

Shift right logical variable : Set $t1 to result of shifting $t2 right

srlv $t1,$t2,$t3 by number of bits specified by value in low-order 5 bits of $t3

sub $t1,$t2,$t3 Subtraction with overflow : set $t1 to ($t2 minus $t3)

Floating point subtraction double precision : Set $f2 to double-

sub.d $f2,$f4,$f6 precision floating point value of $f4 minus $f6

Floating point subtraction single precision : Set $f0 to single-

sub.s $f0,$f1,$f3 precision floating point value of $f1 minus $f3

Subtraction unsigned without overflow : set $t1 to ($t2 minus

subu $t1,$t2,$t3 $t3), no overflow

Store word : Store contents of $t1 into effective memory word

sw $t1,-100($t2) address

Store word from Coprocesor 1 (FPU) : Store 32 bit value in $f1

swc1 $f1,-100($t2) to effective memory word address

Store word left : Store high-order 1 to 4 bytes of $t1 into

memory, starting with effective byte address and continuing

swl $t1,-100($t2) through the low-order byte of its word

Store word right : Store low-order 1 to 4 bytes of $t1 into

memory, starting with high-order byte of word containing

swr $t1,-100($t2) effective byte address and continuing through that byte address

Issue a system call : Execute the system call specified by value in

syscall $v0

teq $t1,$t2 Trap if equal : Trap if $t1 is equal to $t2

Trap if equal to immediate : Trap if $t1 is equal to sign-extended

teqi $t1,-100 16 bit immediate

tge $t1,$t2 Trap if greater or equal : Trap if $t1 is greater than or equal to $t2

Trap if greater than or equal to immediate : Trap if $t1 greater

tgei $t1,-100 than or equal to sign-extended 16 bit immediate

Trap if greater or equal to immediate unsigned : Trap if $t1

greater than or equal to sign-extended 16 bit immediate,

tgeiu $t1,-100 unsigned comparison

Trap if greater or equal unsigned : Trap if $t1 is greater than or

tgeu $t1,$t2 equal to $t2 using unsigned comparision

tlt $t1,$t2 Trap if less than: Trap if $t1 less than $t2

Trap if less than immediate : Trap if $t1 less than sign-extended

tlti $t1,-100 16-bit immediate

Trap if less than immediate unsigned : Trap if $t1 less than sign-

tltiu $t1,-100 extended 16-bit immediate, unsigned comparison

Trap if less than unsigned : Trap if $t1 less than $t2, unsigned

tltu $t1,$t2 comparison

tne $t1,$t2 Trap if not equal : Trap if $t1 is not equal to $t2

Trap if not equal to immediate : Trap if $t1 is not equal to sign-

tnei $t1,-100 extended 16 bit immediate

Truncate double precision to word : Set $f1 to 32-bit integer

trunc.w.d $f1,$f2 truncation of double-precision float in $f2

Truncate single precision to word : Set $f0 to 32-bit integer

trunc.w.s $f0,$f1 truncation of single-precision float in $f1

Bitwise XOR (exclusive OR) : Set $t1 to bitwise XOR of $t2 and

xor $t1,$t2,$t3 $t3

Bitwise XOR immediate : Set $t1 to bitwise XOR of $t2 and zero-

xori $t1,$t2,100 extended 16-bit immediate

MIPS Pseudoinstructions ABSolute value : Set $t1 to absolute value of $t2 (algorithm from

abs $t1,$t2 Hacker's Delight)

add $t1,$t2,-100 ADDition : set $t1 to ($t2 plus 16-bit immediate)

add $t1,$t2,100000 ADDition : set $t1 to ($t2 plus 32-bit immediate)

addi $t1,$t2,100000 ADDition Immediate : set $t1 to ($t2 plus 32-bit immediate)

ADDition Immediate Unsigned: set $t1 to ($t2 plus 32-bit

addiu $t1,$t2,100000 immediate), no overflow

ADDition Unsigned : set $t1 to ($t2 plus 32-bit immediate), no

addu $t1,$t2,100000 overflow

and $t1,$t2,100 AND : set $t1 to ($t2 bitwise-AND 16-bit unsigned immediate)

and $t1,100 AND : set $t1 to ($t1 bitwise-AND 16-bit unsigned immediate)

andi $t1,$t2,100000 AND Immediate : set $t1 to ($t2 bitwise-AND 32-bit immediate)

AND Immediate : set $t1 to ($t1 bitwise-AND 16-bit unsigned

andi $t1,100 immediate)

andi $t1,100000 AND Immediate : set $t1 to ($t1 bitwise-AND 32-bit immediate)

b label Branch : Branch to statement at label unconditionally

Branch if EQual : Branch to statement at label if $t1 is equal to

beq $t1,-100,label 16-bit immediate

Branch if EQual : Branch to statement at label if $t1 is equal to

beq $t1,100000,label 32-bit immediate

Branch if EQual Zero : Branch to statement at label if $t1 is equal

beqz $t1,label to zero

Branch if Greater or Equal : Branch to statement at label if $t1 is

bge $t1,$t2,label greater or equal to $t2

Branch if Greater or Equal : Branch to statement at label if $t1 is

bge $t1,-100,label greater or equal to 16-bit immediate

Branch if Greater or Equal : Branch to statement at label if $t1 is

bge $t1,100000,label greater or equal to 32-bit immediate

Branch if Greater or Equal Unsigned : Branch to statement at

bgeu $t1,$t2,label label if $t1 is greater or equal to $t2 (unsigned compare)

Branch if Greater or Equal Unsigned : Branch to statement at

label if $t1 is greater or equal to 16-bit immediate (unsigned

bgeu $t1,-100,label compare)

Branch if Greater or Equal Unsigned : Branch to statement at

label if $t1 is greater or equal to 32-bit immediate (unsigned

bgeu $t1,100000,label compare)

Branch if Greater Than : Branch to statement at label if $t1 is

bgt $t1,$t2,label greater than $t2

Branch if Greater Than : Branch to statement at label if $t1 is

bgt $t1,-100,label greater than 16-bit immediate

Branch if Greater Than : Branch to statement at label if $t1 is

bgt $t1,100000,label greater than 32-bit immediate

Branch if Greater Than Unsigned: Branch to statement at label if

bgtu $t1,$t2,label $t1 is greater than $t2 (unsigned compare)

Branch if Greater Than Unsigned: Branch to statement at label if

bgtu $t1,-100,label $t1 is greater than 16-bit immediate (unsigned compare)

Branch if Greater Than Unsigned: Branch to statement at label if

bgtu $t1,100000,label $t1 is greater than 16-bit immediate (unsigned compare)

Branch if Less or Equal : Branch to statement at label if $t1 is less

ble $t1,$t2,label than or equal to $t2

Branch if Less or Equal : Branch to statement at label if $t1 is less

ble $t1,-100,label than or equal to 16-bit immediate

Branch if Less or Equal : Branch to statement at label if $t1 is less

ble $t1,100000,label than or equal to 32-bit immediate

Branch if Less or Equal Unsigned : Branch to statement at label if

bleu $t1,$t2,label $t1 is less than or equal to $t2 (unsigned compare)

Branch if Less or Equal Unsigned : Branch to statement at label if

bleu $t1,-100,label $t1 is less than or equal to 16-bit immediate (unsigned compare)

Branch if Less or Equal Unsigned : Branch to statement at label if

bleu $t1,100000,label $t1 is less than or equal to 32-bit immediate (unsigned compare)

Branch if Less Than : Branch to statement at label if $t1 is less

blt $t1,$t2,label than $t2

Branch if Less Than : Branch to statement at label if $t1 is less

blt $t1,-100,label than 16-bit immediate

Branch if Less Than : Branch to statement at label if $t1 is less

blt $t1,100000,label than 32-bit immedi

Dettagli
Publisher
A.A. 2016-2017
27 pagine
SSD Ingegneria industriale e dell'informazione ING-INF/01 Elettronica

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher UNSIGNED di informazioni apprese con la frequenza delle lezioni di Calcolatori elettronici e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università Università degli Studi di Pavia o del prof Danese Giovanni.