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Estratto del documento

IN

between the input a quantity proportional to the output:

WX;

( )

= − ∙ → = = −

WX; QM WX; 1 +

QM

QM QM

= − ∙ = ∙ ≫ 1 → ≈ ≪

U QM WX; U QM

1 +

The OP-AMP takes two voltage values (input pins) and subtract them to generate the differ-

rential input; then, it multiplies the difference by the gain, and gives this result as an output.

The OP-AMP in negative feedback performs exactly the same role as the summing node and

A block put together (A = gain); V represents the differential input.

E

By guaranteeing the OP-AMP works with small differential

∙ ≫ 1

inputs, making it a good amplifier.

The drawback is that the gain decreases significantly as compared

9 Y "

+,$

to the open-loop case: = ≈

9 "NY< <

-.

The electrical network that embodies the behavior of is simple to be realized, and is also

temperature-insensitive (even though the gain of the OP-AMP varies with the temperature).

Bandwidth (BW: closed-loop bandwidth, f : open-loop bandwidth) is extended by a factor

B

(1 ) (1 )

, the input and output impedances improve by a factor and the overall

+ +

gain sensitivity on the open-loop gain (A: open-loop gain, G: closed-loop) of the OP-AMP is

(1 )

reduced by a factor : depends only

+ ∙ = ∙ = , ,

R

on the characteristics of the OP-AMP (not on the feedback network), so it is typically used

as a metric to compare the performance of different OP-AMPs.

Virtual Short Circuit (not an OP-AMP property itself, arises since we use negative feedback):

If we apply a to the non-inverting input, then the voltage at the inverting input will be

∙ = ∙ ∙ ≈

WX; QM QM

1 +

If we know the voltage at one input pin, then we also know the voltage at the other one!

à 24

VOLTAGE BUFFER (OR FOLLOWER):

à

The polarity of the feedback is negative, since the output terminal is connected back to the

inverting input by means of a feedback network (feedback network = short-circuit): checking

the polarity of the feedback is important to understand if we can use V.S.C.

This circuit is obtained by setting which means the strongest feedback possible and the

=1, '

= ≈ 1 → =

*+, -.

maximum gain reduction (maximizes closed-loop bandwidth) → J "(') (1

= + ) ≈

/ /

The input voltage is provided by a circuit that can be represented by its Thevenin equivalent

as a voltage source, V, in series with a resistor, R : connecting a load L to the circuit, makes

S

1

it split voltage between R and R to maximize this value, we use the voltage

!

à ;

=

S L 0 1 (1

! "

buffer, so that the load seen by the circuit will be a very high impedance because of the pro-

perty of the OP-AMP input pins (voltage at buffer input is V, but ): if we connect

=

WX; QM

a load R to the output of voltage buffer, the current on the load (V /R ) will be provided

S OUT S

by the OP-AMP, not by the circuit providing the input voltage, avoiding any load effects.

INVERTING AMPLIFIER:

à

Feedback is actually negative because V is connected back to the ne-

OUT

gative input pin by a feedback network, so we can apply the V.S.C.

N ! current flows entirely through R

→ = 0 = → = 0 → f

(IDC) D(I&

! =

[ (I [ [

(I (I BC)

= = →! → =− <0

!

(I = − = −

[ BC) BC)

(I (I (I (I

The closed-loop gain of this configuration is < 0 (output waveform is flipped as compared to

the input one) and can be regulated by properly adjusting the value of the resistors; if we

choose resistors made of the same material, their resistivity relative change with tempe-

rature will be the same, canceling out the temperature dependence of the closed-loop gain.

NON-INVERTING AMPLIFIER:

à

Similar to the inverting amplifier, but provides a positive gain.

(I

=

⎧ "

N !

= = BC) #

"

QM

! → =1+ >0

=

⎨ BC) (I

" # (I "

=

#

#

N.B. Gain is > 0, and input voltage is applied to non-inverting (positive) input; in the inverting

amplifier, gain is < 0 and input voltage is applied to inverting (negative) input.

INTEGRATOR AMPLIFIER:

à

Provides an output voltage that is proportional to the time integral of

the input voltage, which is fed to the inverting input pin through a

resistor, R, with the non-inverting input being grounded; since output

!

is fed back to the inverting input pin, we can use V.S.C. → = 0.

(I

= = 1 1

$ %

(I BC)

• ¡ ¡ ¡

→ = − → = − → = −

BC) (I BC) (I

BC)

= −

% 25

The proportionality constant is negative (input is fed to the inverting input) and regulated

by the values of R and C: RC product has dimension of time and is called “time constant”.

If the capacitor is discharged, supplying a positive input V will make V decrease until limit

OUT

set by the negative supply voltage: the output will not be able to decrease any further, due

to the limitation imposed by the power supply no more integrator behavior; to avoid this

à

problem, we make the capacitor discharge when no input is provided, bringing the output V

to 0: capacitor discharge is needed every time we need to “reset” the output voltage to 0.

A more realistic integrator model is the one on the right, in which the

feedback network is not just purely capacitive, but rather resistive-ca-

pacitive: this is because R allows C to discharge. Supposing a dischar-

f f

ged capacitor, if we feed a constant positive voltage at the input of the

circuit, V will start decreasing over time; current injected in the in-

OUT

put resistors will split in between R and C (which will experience the

f f

same ∆V): a current will flow in the loop formed by R and C , allowing

f f

the capacitor to discharge. When the current, which decreases expo-

nentially, reaches 0 A, the capacitor is fully discharged (V =0 V) (without R no current can

OUT f

flow if the input is disconnected, and C will keep its charge: R provides a path for the charge

f f

to flow out of C ). Time constant of discharging process: .

f [ [

R is used to compensate for the effects of the bias currents, while R re-presents a generic

n L

resistive load (equivalent circuit of next stage).

Since the impedance of feedback network varies with frequency, the gain will do the same:

• Low frequencies: capacitor = open circuit, and the OP-AMP

is an inverting amplifier;

• Around a certain frequency: magnitude of impedance of C

f

assumes values that are comparable with R C can’t be

à

f f

ignored anymore;

• High frequencies: impedance of C is lower and dominates

f

the parallel of R and C : we ignore R ideal integrator;

à

f f f

• Very high-f: C = short circuit buffer (0 dB gain).

à

f

DIFFERENTIATOR AMPLIFIER:

à

The input resistance aim is to generate a current that is proportional to V ; instead, the cur-

in

rent-voltage relation of the capacitor is derivative, and V is the integral of the V .

OUT IN

With this circuit we can then obtain as output the derivative of V .

IN

(I

= = −

$ BC)

(I

• → = −

BC)

(I

= =

% $

A more realistic integrator model is the one on the right; considering

to alimentate it in DC (freq=0), every ∆V and I will be 0 (C = open circ.);

if the signal has an infinite frequency, C = short-circuit: inverting pin

V should be at the same time 0 V (due to V.S.C.) and at V (due to the

in

capacitor acting like a short-circuit) we add R in series to C , whi-

à in in

ch avoids an unwanted short-circuit between V and inverting input.

in 26

C is introduced to avoid unwanted amplification at high-frequencies (characterised by elec-

f

tronic noise), for which the circuit behaves as an inverting amplifier (and not as a differen-

tiator). For low enough frequencies, the impedance C >> R , and their parallel combination

f f

is approximated by R alone. At higher frequencies the parallel is approximated by the

f

" "

capacitor C alone. If :

>

f $ % $ %

/ / 01 01

"

• : ideal differentiator;

≪ , ≈ 0 à

(I [

$ %

01 01

" "

• : inverting ampli-

<< , ≈ 0 à

[ (I

$ % $ %

01 01 / / $

/

fier, const. frequency response/gain Y− Z;

$

01

"

• : inverting amplifier, ne-

≫ , ≈ 0 à

[ (I

$ %

/ /

gative slope/decrease in gain by -20 dB/decade.

SUMMING AMPLIFIER:

à

The output voltage is proportional to the weighted sum of the in-

put voltages: the working principle is based on the superposition

principle (summing up n contributions that can be calculated by

solving n equivalent circuits, obtained by letting only the n-th sou-

rce be active while suppressing remaining ones). Final formula:

I

(

= − ∙ ¢ → . ℎ ℎ

BC) [

(

(\"

DIFFERENCE AMPLIFIER:

à

The dual of the summing amplifier can be obtained by combining an

inverting amplifier and a summing amplifier, in order to get the dif-

ference of the two signals; a more compact solution is the differe-

nce amplifier, which exploits the OP-AMP as a differential amplifier,

so it can calculate the difference between two voltages. To have a

good difference amplifier we would like the out

Dettagli
A.A. 2021-2022
77 pagine
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SSD Ingegneria industriale e dell'informazione ING-INF/04 Automatica

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher federico.giandrini di informazioni apprese con la frequenza delle lezioni di Automotive Electronics Systems e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università Università degli Studi di Modena e Reggio Emilia o del prof Puglisi Francesco.