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Motorola 68000 - Instruction set

Appunti in inglesedi Architetture Sistemi Elaborazione del prof. Mazzocca su Motorola 68000 - Instruction set: ABCD (Add decimal with extend), ADD (Add binary), ADDA (Add address), ADDI (Add immediate), ADDQ (Add quick), ADDX (Add extended), AND logi

... Espandi »cal, ASL, ASR (Arithmetic shift left/right) « Comprimi
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  • 20-03-2013
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The 68000's Instruction Set We have included this appendix to save you the task of having to turn to secondary material when writing 68000 assembly language programs. Since most programmers are not interested in the encoding of instructions, details of instruction encoding have been omitted (i.e., the actual op-code bit patterns). Applications of some of the instructions have been provided to demonstrate how they can be used in practice. Instructions are listed by mnemonic in alphabetical order. The information provided about each instruction is: its assembler syntax, its attributes (i.e., whether it takes a byte, word, or longword operand), its description in words, the effect its execution has on the condition codes, and the addressing modes it may take. The effect of an instruction on the CCR is specified by the following codes: U The state of the bit is undefined (i.e., its value cannot be predicted) - The bit remains unchanged by the execution of the instruction * The bit is set... Espandi » or cleared according to the outcome of the instruction. Unless an addressing mode is implicit (e.g., NOP, RESET, RTS, etc.), the legal source and destination addressing modes are specified by their assembly language syntax. The following notation is used to describe the 68000's instruction set. Dn, An Data and address register direct. (An) Address register indirect. (An)+, -(An) Address register indirect with post-incrementing or predecrementing. (d,An), (d,An,Xi) Address register indirect with displacement, and address register indirect with indexing and a displacement. ABS.W, Absolute addressing with a 16-bit or a 32-bit address. ABS.L (d,PC), (d,PC,Xi) Program counter relative addressing with a 16-bit offset, or with an 8-bit offset plus the contents of an index register. imm An immediate value (i.e., literal) which may be 16 or 32 bits, depending on the instruction. 1 2 The 68000's Instruction Set Two notations are employed for address register indirect addressing. The notation originally used to indicate address register indirect addressing has been superseded. However, the Teesside 68000 simulator supports only the older form. Old notation Current notation d(An), d(An,Xi) d(PC), d(PC,Xi) (d,An), (d,An,Xi) (d,PC), (d,PC,Xi) ABCD Add decimal with extend Operation: [destination]10 ← [source]10 + [destination]10 + [X] Syntax: ABCD Dy,Dx ABCD -(Ay),-(Ax) Attributes: Size = byte Description: Add the source operand to the destination operand a « Comprimi