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Embedded systems [6/9 credits course]

Theory

8 T/F questions: 0.5 points for right answers, -0.25 points for wrong ones, and 0 for no answer.

3 open questions: up to 2 points for right and complete answers.

Available time: 60 minutes.

C4uC1 C4uC exercise: up to 12 points for right and complete solutions.

Available time: 120 minutes.

Name:

Theory: true or false?

F 1) An embedded system is always designed to be as general-purpose as possible.

V 2) To exploit a Digital Signal Processor it is needed a specific compiler.

F 3) The Intel 8051 model used in the homelab has only 2 input/output ports.

V 4) It is possible to use floating-point arithmetic also on processors without a Floating Point Unit.

V 5) About WSN homelab: the notation install.ID is used to assign an ID to the target node.

F 6) Development kits are useful only for FPGA-based development.

V 7) TIVA board used in the homelab contains an ARM core.

F 8) Granularities used for active and passive roles of the time are always the same.

Theory: open questions

1) Describe the main Processors Technologies and their differences.

2) Describe UMA (Unified Memory Access) and NUMA (Not UMA) systems and their differences.

3) Describe the concept of Time-to-Market and its relationship with embedded systems design.

Embedded systems [6/9 credits course]

Theory

8 T/F questions: 0.5 points for right answers, -0.25 points for wrong ones, and 0 for no answer.

3 open questions: up to 2 points for right and complete answers.

Available time: 60 minutes.

C4uC1 C4uC exercise: up to 12 points for right and complete solutions.

Available time: 120 minutes.

Name:

Theory: true or false?

F 1) An embedded system contains always at least 1 General Purpose Processor.

V 2) To exploit a Single Purpose Processor it is needed a specific compiler.

V 3) It is possible to use fixed-point arithmetic also on processors without a Floating Point Unit.

F 4) About WSN homelab: the notation install.ID is used to select the USB port connected to the PC.

F 5) Development kits are useful only for Wireless Sensor Networks development.

F 6) TIVA board used in the homelab contains an Application Specific Processor.

F 7) Timers implementation based on “minimal HW/SW” are the best for hard real-time systems.

8) Given the following nesC code related to an event management …

event void myTimer.fired(){
counter++;
call Leds.Led0Toggle();
if (!busy){
BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, NULL));
btrpkt->nodeid = TOS_NODE_ID;
btrpkt->counter = counter;
if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS){
busy = TRUE;
}
}
}

F It belongs to a Configuration component.

Theory: open questions

1) Describe the main differences between Cache and Scratch Pad memories.

2) Describe the main components of a Design Technology and their role.

3) Describe the most common Active Temporizations.

Embedded systems 2016/2017/2018: theory [6/9 credits course]

8 T/F questions: 0.5 points for right answers, -0.25 points for wrong ones, and 0 for no answer.

3 open questions: up to 2 points for right and complete answers.

Max total: 10 points.

Available time: 60 minutes.

Name:__________________________________________________________________________

True or false?

F 1) An embedded system is always designed to be as general-purpose as possible.

V 2) To exploit a Single Purpose Processor it is needed a compiler for a specific ISA.

3) The opportunity to perform preemption of kernel processes allows to avoid the priority inversion problem.

V 4) The Instruction Set Architecture of an Applications Specific Instructions Processor is normally customizable.

F 5) The Intel 8051 model used in the homelab has only 2 input/output ports.

V 6) Phase Change Memories are non-volatile ones.

V 7) It is possible to use floating-point arithmetic also on processors without a FPU.

8) If the utilization factor of a task set is greater than 1, the task set cannot be scheduled.

Open questions

1) Describe the different “Processors Technologies” and their main differences.

2) Describe the RM and EDF scheduling algorithms and their main differences.

3) Given the following code, complete the sequence diagram (reporting comments, if needed), indicating all the (possible) calls and events in the first 1000 ms of execution (after the first indicated event).

module BlinkC()
configuration BlinkAppC
{
uses interface Timer<TMilli> as Timer0;
}
uses interface Timer<TMilli> as Timer1;
implementation
uses interface Timer<TMilli> as Timer2;
{
uses interface Leds;
components MainC, BlinkC, LedsC;
uses interface Boot;
components new TimerMilliC() as Timer0;
components new TimerMilliC() as Timer1;
}
components new TimerMilliC() as Timer2;
implementation
{
event void Boot.booted()
BlinkC -> MainC.Boot;
{
call Timer0.startPeriodic( 200 );
BlinkC.Timer0 -> Timer0;
call Timer1.startPeriodic( 350 );
BlinkC.Timer1 -> Timer1;
call Timer2.startPeriodic( 950 );
BlinkC.Timer2 -> Timer2;
}
BlinkC.Leds -> LedsC;
}
event void Timer0.fired(){
call Leds.led0Toggle();
}
event void Timer1.fired(){
call Leds.led1Toggle();
}
event void Timer2.fired(){
call Leds.led2Toggle();
}
}

Embedded systems 2016/2017/2018: theory [6/9 credits course]

8 T/F questions: 0.5 points for right answers, -0.25 points for wrong ones, and 0 for no answer.

3 open questions: up to 2 points for right and complete answers.

Total: 10 points.

Max time: 60 minutes.

Available.

Name:__________________________________________________________________________

True or false?

F 1) An embedded system is always designed to be as general-purpose as possible.

V 2) To exploit a Single Purpose Processor it is needed a compiler for a specific ISA.

V 3) A real-time application that is feasible on a given processor can become infeasible when running on a faster processor.

F 4) The Instruction Set Architecture of a Single Purpose Processor is normally customizable.