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Embedded Systems Technology - Custom single-purpose processors Appunti scolastici Premium

Processor is a:
– digital circuit that performs computation tasks;
– controller and datapath.
Its general-purpose is variety of computation tasks, its single-purpose is one particular computation task. A custom single-purpose ia a non-standard task.
A custom single-purpose processor may... Vedi di più

Esame di Sistemi embedded docente Prof. L. Pomante

Anteprima

ESTRATTO DOCUMENTO

Creating the datapath

• Create a register for any !1

1: 1

declared variable !(!go_i)

2: x_i y_i

!go_i

• Create a functional unit for Datapath

2-J: x_sel

each arithmetic operation n-bit 2x1 n-bit 2x1

3: x = x_i y_sel

x_ld 0: x 0: y

• Connect the ports, registers 4: y = y_i y_ld

and functional units !(x!=y)

5: != < subtractor subtractor

x!=y 5: x!=y 6: x<y 8: x-y 7: y-x

– Based on reads and writes 6: x_neq_y

x<y !(x<y) x_lt_y

– Use multiplexors for 9: d

y = y -x x = x - y d_ld

7: 8:

multiple sources d_o

6-J:

• Create unique identifier 5-J:

– for each datapath component d_o = x

9:

control input and output 1-J:

Embedded Systems Design: A Unified 15

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

Creating the controller’s FSM

go_i

!1 • Same structure as FSMD

1: Controller !1

1 1:

!(!go_i) 0000 1 • Replace complex

!(!go_i)

2: 0001 2:

!go_i !go_i actions/conditions with

2-J: 0010 2-J:

3: x = x_i x_sel = 0 datapath configurations

0011 3: x_ld = 1

4: y = y_i y_sel = 0 x_i y_i

0100 4: y_ld = 1 Datapath

!(x!=y)

5: !x_neq_y

5:

0101 x_sel

x!=y n-bit 2x1 n-bit 2x1

x_neq_y y_sel

6: 0110 6: x_ld

x<y !(x<y) 0: x 0: y

x_lt_y !x_lt_y y_ld

y_sel = 1 x_sel = 1

y = y -x x = x - y 7: 8:

7: 8: y_ld = 1 x_ld = 1

0111 1000

6-J: != < subtractor subtractor

1001 6-J: 5: x!=y 6: x<y 8: x-y 7: y-x

x_neq_y

5-J: 5-J:

1010 x_lt_y 9: d

d_o = x

9: 9:

1011 d_ld = 1 d_ld d_o

1-J:

1100

1-J: Embedded Systems Design: A Unified 16

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 8

Splitting into a controller and datapath

go_i

Controller

Controller implementation model !1 x_i y_i

1:

0000

go_i 1

x_sel !(!go_i) (b) Datapath

2:

0001

Combinational y_sel x_sel

logic !go_i

x_ld n-bit 2x1 n-bit 2x1

0010 y_sel

2-J:

y_ld x_ld

x_sel = 0

x_neq_y 0: x 0: y

3:

0011 x_ld = 1

x_lt_y y_ld

d_ld y_sel = 0

0100 4: y_ld = 1 != < subtractor subtractor

x_neq_y=0 5: x!=y 6: x<y 8: x-y 7: y-x

5:

0101 x_neq_y

Q3 Q2 Q1 Q0 x_neq_y=1 x_lt_y

6:

0110 9: d

State register d_ld

x_lt_y=1 x_lt_y=0

I3 I2 I1 I0 y_sel = 1 x_sel = 1 d_o

7: 8:

y_ld = 1 x_ld = 1

0111 1000

1001 6-J:

5-J:

1010 9:

1011 d_ld = 1

1-J:

1100

Embedded Systems Design: A Unified 17

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

Controller state table for the GCD example

Inputs Outputs

Q3 Q2 Q1 Q0 x_neq x_lt_ go_i I3 I2 I1 I0 x_sel y_sel x_ld y_ld d_ld

_y y

0 0 0 0 * * * 0 0 0 1 X X 0 0 0

0 0 0 1 * * 0 0 0 1 0 X X 0 0 0

0 0 0 1 * * 1 0 0 1 1 X X 0 0 0

0 0 1 0 * * * 0 0 0 1 X X 0 0 0

0 0 1 1 * * * 0 1 0 0 0 X 1 0 0

0 1 0 0 * * * 0 1 0 1 X 0 0 1 0

0 1 0 1 0 * * 1 0 1 1 X X 0 0 0

0 1 0 1 1 * * 0 1 1 0 X X 0 0 0

0 1 1 0 * 0 * 1 0 0 0 X X 0 0 0

0 1 1 0 * 1 * 0 1 1 1 X X 0 0 0

0 1 1 1 * * * 1 0 0 1 X 1 0 1 0

1 0 0 0 * * * 1 0 0 1 1 X 1 0 0

1 0 0 1 * * * 1 0 1 0 X X 0 0 0

1 0 1 0 * * * 0 1 0 1 X X 0 0 0

1 0 1 1 * * * 1 1 0 0 X X 0 0 1

1 1 0 0 * * * 0 0 0 0 X X 0 0 0

1 1 0 1 * * * 0 0 0 0 X X 0 0 0

1 1 1 0 * * * 0 0 0 0 X X 0 0 0

1 1 1 1 * * * 0 0 0 0 X X 0 0 0

Embedded Systems Design: A Unified 18

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 9

Completing the GCD custom single-purpose

processor design

• We finished the datapath …

• We have a state table for controller datapath

the next state and control registers

next-state

and

logic control

logic

– All that’s left is

combinational logic functional

state units

register

design

• This is not an optimized …

design, but we see the a view inside the controller and datapath

basic steps

Embedded Systems Design: A Unified 19

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

RT-level custom single-purpose processor

design

• We often start with a state Specification

machine Sende Bridge Rece

rdy_in

r A single-purpose processor that iver

rdy_out

converts two 4-bit inputs, arriving one

– Rather than algorithm clock at a time over data_in along with a

rdy_in pulse, into one 8-bit output on

Problem data_out along with a rdy_out pulse.

– Cycle timing often too central data_in(4) data_out(8)

to functionality

• Example Bridge

rdy_in=0 rdy_in=1

rdy_in=1

WaitFirst4 RecFirst4Start RecFirst4End

– Bus bridge that converts 4-bit data_lo=data_in

bus to 8-bit bus rdy_in=0 rdy_in=0 rdy_in=1

rdy_in=1

– Start with FSMD WaitSecond4 RecSecond4Start RecSecond4End

FSMD data_hi=data_in

– Known as register-transfer rdy_in=0 Inputs

(RT) level Send8Start rdy_in: bit; data_in: bit[4];

Send8End

data_out=data_hi Outputs

rdy_out=0

& data_lo

– Exercise: complete the design rdy_out: bit; data_out:bit[8]

rdy_out=1 Variables

data_lo, data_hi: bit[4];

Embedded Systems Design: A Unified 20

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 10

RT-level custom single-purpose processor

design (cont’)

Bridge

(a) Controller

rdy_in=0 rdy_in=1

rdy_in=1

WaitFirst4 RecFirst4Start RecFirst4End

data_lo_ld=1

rdy_in=0 rdy_in=0 rdy_in=1

rdy_in=1

WaitSecond4 RecSecond4Start RecSecond4End

data_hi_ld=1

Send8Start Send8End

data_out_ld=1 rdy_out=0

rdy_out=1

rdy_in rdy_out

clk data_out

data_in(4) data_lo_ld

data_out_ld data_hi_ld

registers data_hi data_lo

all

to data_out

(b) Datapath

Embedded Systems Design: A Unified 21

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

Optimizing single-purpose processors

• Optimization is the task of making design metric

values the best possible

• Optimization opportunities

– original program

– FSMD

– datapath

– FSM

Embedded Systems Design: A Unified 22

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 11

Optimizing the original program

• Analyze program attributes and look for areas of

possible improvement

– number of computations

– size of variable

– time and space complexity

– operations used

• multiplication and division very expensive

Embedded Systems Design: A Unified 23

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

Optimizing the original program (cont’)

original program optimized program

0: int x, y; 0: int x, y, r;

1: while (1) { 1: while (1) {

2: while (!go_i); 2: while (!go_i);

// x must be the larger number

3: x = x_i;

4: y = y_i; 3: if (x_i >= y_i) {

5: while (x != y) { 4: x=x_i;

replace the subtraction

6: if (x < y) 5: y=y_i;

operation(s) with modulo

7: y = y - x; }

operation in order to speed 6: else {

else up program

8: x = x - y; 7: x=y_i;

8: y=x_i;

}

9: d_o = x; }

} 9: while (y != 0) {

10: r = x % y;

11: x = y;

12: y = r;

}

13: d_o = x;

}

GCD(42, 8) - 9 iterations to complete the loop GCD(42,8) - 3 iterations to complete the loop

x and y values evaluated as follows : (42, 8), (43, 8), x and y values evaluated as follows: (42, 8), (8,2),

(26,8), (18,8), (10, 8), (2,8), (2,6), (2,4), (2,2). (2,0)

Embedded Systems Design: A Unified 24

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 12

Optimizing the FSMD

• Areas of possible improvements

– merge states

• states with constants on transitions can be eliminated, transition

taken is already known

• states with independent operations can be merged

– separate states

• states which require complex operations (a*b*c*d) can be broken

into smaller states to reduce hardware size

– scheduling

Embedded Systems Design: A Unified 25

Hardware/Software Introduction, (c) 2000 Vahid/Givargis

Optimizing the FSMD (cont.)

int x, y; optimized FSMD

!1 original FSMD

1: int x, y;

1 eliminate state 1 – transitions have constant values

!(!go_i) 2:

2: go_i !go_i

!go_i x = x_i

2-J: 3: y = y_i

merge state 2 and state 2J – no loop operation in

between them

x = x_i

3: 5:

4: y = y_i x<y x>y

merge state 3 and state 4 – assignment operations are 8:

y = y -x x = x - y

7:

independent of one another

!(x!=y)

5: x!=y 9: d_o = x

merge state 5 and state 6 – transitions from state 6 can

6: be done in state 5

x<y !(x<y)

y = y -x x = x - y

8:

7: eliminate state 5J and 6J – transitions from each state

6-J: can be done from state 7 and state 8, respectively

5-J: eliminate state 1-J – transition from state 1-J can be

done directly from state 9

d_o = x

9:

1-J: Embedded Systems Design: A Unified 26

Hardware/Software Introduction, (c) 2000 Vahid/Givargis 13


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DESCRIZIONE DISPENSA

Processor is a:
– digital circuit that performs computation tasks;
– controller and datapath.
Its general-purpose is variety of computation tasks, its single-purpose is one particular computation task. A custom single-purpose ia a non-standard task.
A custom single-purpose processor may be:
– fast, small, low power;
– but, high NRE, longer time-to-market, less flexible.


DETTAGLI
Corso di laurea: Corso di laurea magistrale in ingegneria delle telecomunicazioni
SSD:
Università: L'Aquila - Univaq
A.A.: 2011-2012

I contenuti di questa pagina costituiscono rielaborazioni personali del Publisher Atreyu di informazioni apprese con la frequenza delle lezioni di Sistemi embedded e studio autonomo di eventuali libri di riferimento in preparazione dell'esame finale o della tesi. Non devono intendersi come materiale ufficiale dell'università L'Aquila - Univaq o del prof Pomante Luigi.

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